Jump to main content
Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
Search
Product Pages
SAMA7G54
Home
4
System Controller
4.16
Power Management Controller (PMC)
4.16.15
Clock Switching Details
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
4.1
Overview
4.2
System Controller Write Protection (SYSCWP)
4.3
General Purpose Backup Registers (GPBR)
4.4
Dual Watchdog Timer (DWDT)
4.5
Reset Controller (RSTC)
4.6
Real-Time Timer (RTT)
4.7
Real-Time Clock (RTC)
4.8
Shutdown Controller (SHDWC)
4.9
64-bit Periodic Interval Timer (PIT64B)
4.10
Chip Identifier (CHIPID)
4.11
OTP Memory Controller (OTPC)
4.12
Special Function Registers (SFR)
4.13
Special Function Registers Backup (SFRBU)
4.14
Slow Clock Controller (SCKC)
4.15
Clock Generator
4.16
Power Management Controller (PMC)
4.16.1
Description
4.16.2
Embedded Characteristics
4.16.3
Block Diagram
4.16.4
Processor Clock Controller
4.16.5
Free-Running Processor Clock
4.16.6
Main System Bus Clock Controller
4.16.7
Peripheral and Generic Clock Controller
4.16.8
Programmable Clock Output Controller
4.16.9
Ultra-Low Power Mode and Fast Start-Up
4.16.10
Asynchronous Partial Wake-Up
4.16.11
Main Crystal Oscillator Failure Detection
4.16.12
32.768 kHz Crystal Oscillator Frequency Monitor
4.16.13
MCK
0
Frequency Monitor
4.16.14
Recommended Programming Sequence
4.16.15
Clock Switching Details
4.16.15.1
CPU Clock Switching Timings
4.16.15.2
Main System Bus Clocks Switching Timings
4.16.16
Register Write Protection
4.16.17
Register Summary
4.17
Parallel Input/Output Controller (PIO)
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
4.16.15 Clock Switching Details
