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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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Product Pages
SAMA7G54
Home
4
System Controller
4.7
Real-Time Clock (RTC)
4.7.5
Functional Description
4.7.5.6
Updating Time/Calendar
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
4.1
Overview
4.2
System Controller Write Protection (SYSCWP)
4.3
General Purpose Backup Registers (GPBR)
4.4
Dual Watchdog Timer (DWDT)
4.5
Reset Controller (RSTC)
4.6
Real-Time Timer (RTT)
4.7
Real-Time Clock (RTC)
4.7.1
Description
4.7.2
Embedded Characteristics
4.7.3
Block Diagram
4.7.4
Product Dependencies
4.7.5
Functional Description
4.7.5.1
Reference Clock
4.7.5.2
Timing
4.7.5.3
Alarm
4.7.5.4
Error Checking when Programming
4.7.5.5
RTC Internal Free-Running Counter Error Checking
4.7.5.6
Updating Time/Calendar
4.7.5.6.1
Calendar Mode
4.7.5.6.2
UTC Mode
4.7.5.7
RTC Accurate Clock Calibration
4.7.5.8
Waveform Generation
4.7.5.9
Tamper Timestamping
4.7.6
Register Summary
4.8
Shutdown Controller (SHDWC)
4.9
64-bit Periodic Interval Timer (PIT64B)
4.10
Chip Identifier (CHIPID)
4.11
OTP Memory Controller (OTPC)
4.12
Special Function Registers (SFR)
4.13
Special Function Registers Backup (SFRBU)
4.14
Slow Clock Controller (SCKC)
4.15
Clock Generator
4.16
Power Management Controller (PMC)
4.17
Parallel Input/Output Controller (PIO)
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
4.7.5.6 Updating Time/Calendar
