17.5.12 Multi-Pin Configuration
For faster configuration of the port module, the multi-pin configuration write enables the configuration of several pins of a port in a single cycle. Especially with large pin count devices, this function can significantly speed up PORT pin configuration operations.
Writing to this register may be followed by a write to either of the Multi-Pin Control (PORTx.PINCTRLUPD/SET/CLR) registers to update the Pin n Control (PORTx.PINnCTRL) registers for PORTx.
This register is mirrored across all PORTx modules.
| Name: | PINCONFIG |
| Offset: | 0x0B |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INVEN | PULLUPEN | ISC[2:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bit 7 – INVEN Inverted I/O Enable
| Value | Description |
|---|---|
| 0 | Input and output values are not inverted |
| 1 | Input and output values are inverted |
Bit 3 – PULLUPEN Pull-Up Enable
| Value | Description |
|---|---|
| 0 | Pull-up disabled |
| 1 | Pull-up enabled |
Bits 2:0 – ISC[2:0] Input/Sense Configuration
This bit field controls the input and sense configuration of pin n. The sense configuration determines how to trigger a port interrupt.
- If the digital input buffer for pin n is disabled, bit n in the Input Value (PORTx.IN) register will not be updated.
- The LEVEL interrupt will keep triggering continuously as long as the pin stays low.
| Value | Name | Description |
|---|---|---|
| 0x0 | INTDISABLE | Interrupt disabled but digital input buffer enabled |
| 0x1 | BOTHEDGES | Interrupt enabled with sense on both edges |
| 0x2 | RISING | Interrupt enabled with sense on rising edge |
| 0x3 | FALLING | Interrupt enabled with sense on falling edge |
| 0x4 | INPUT_DISABLE | Interrupt and digital input buffer disabled(1) |
| 0x5 | LEVEL | Interrupt enabled with sense on low level(2) |
| other | — | Reserved |