17.7.4 Interrupt Flags
| Name: | INTFLAGS |
| Offset: | 0x03 |
| Reset: | 0x00 |
| Property: | - |
Access to the Virtual PORT registers has the same outcome as access to the regular registers but allows for memory-specific instructions, such as bit manipulation instructions, which cannot be used in the extended I/O Register space where the regular PORT registers reside.
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| INT[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – INT[7:0] Pin Interrupt Flag
Pin Interrupt Flag n is cleared by writing a ‘1’ to it.
Pin Interrupt Flag n is set when the change or state of pin n (Pxn) matches the pin’s Input/Sense Configuration (ISC) in PORTx.PINnCTRL.
Writing a ‘0’ to bit n in this bit field has no effect.
Writing a ‘1’ to bit n in this bit field will clear Pin
Interrupt Flag n.