34.5.1 Control A
| Name: | CTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RUNSTDBY | OUTEN | INVERT | ENABLE | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 7 – RUNSTDBY Run in Standby
Writing this bit to '1' will cause the ZCD to
remain active when the device enters Standby sleep mode.
Bit 6 – OUTEN Output Pin Enable
1’ connects the OUT signal to a supported
pin.Bit 3 – INVERT Invert Enable
1’ inverts the ZCD output.Bit 0 – ENABLE ZCD Enable
1' enables the ZCD.