29.5.2 MUX Control A
Name: | MUXCTRLA |
Offset: | 0x02 |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
INVERT | MUXPOS[1:0] | MUXNEG[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit 7 – INVERT Invert AC Output
1
’ to this bit enables inversion of the output of the AC. This
effectively inverts the input to all the peripherals connected to the signal and
affects the internal status signals.Bits 4:3 – MUXPOS[1:0] Positive Input MUX Selection
Value | Name | Description |
---|---|---|
0x0 |
AINP0 | Positive pin 0 |
0x1 |
AINP1 | Positive pin 1 |
0x2 |
AINP2 | Positive pin 2 |
0x3 |
AINP3 | Positive pin 3 |
Bits 1:0 – MUXNEG[1:0] Negative Input MUX Selection
Value | Name | Description |
---|---|---|
0x0 |
AINN0 | Negative pin 0 |
0x1 |
AINN1 | Negative pin 1 |
0x2 |
VREF | Voltage Reference |
0x3 |
DAC | DAC output Instance n of the AC will use instance n of the DAC: for example, AC0 will use DAC0 and AC1 will use DAC1 |