10.4 Register Summary
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | MCLKCTRLA | 7:0 | CLKOUT | CLKSEL[1:0] | ||||||
| 0x01 | MCLKCTRLB | 7:0 | PDIV[3:0] | PEN | ||||||
| 0x02 | MCLKLOCK | 7:0 | LOCKEN | |||||||
| 0x03 | MCLKSTATUS | 7:0 | EXTS | XOSC32KS | OSC32KS | OSC20MS | SOSC | |||
0x04 ... 0x0F | Reserved | |||||||||
| 0x10 | OSC20MCTRLA | 7:0 | RUNSTDBY | |||||||
| 0x11 | OSC20MCALIBA | 7:0 | CAL20M[5:0] | |||||||
| 0x12 | OSC20MCALIBB | 7:0 | LOCK | TEMPCAL20M[3:0] | ||||||
0x13 ... 0x17 | Reserved | |||||||||
| 0x18 | OSC32KCTRLA | 7:0 | RUNSTDBY | |||||||
0x19 ... 0x1B | Reserved | |||||||||
| 0x1C | XOSC32KCTRLA | 7:0 | CSUT[1:0] | SEL | RUNSTDBY | ENABLE | ||||