Operating Conditions- VDDREG - 1.75V -
1.85V, -40°C to +85°C, DC to 300 MHz
- VDDIO/AVDD -
1.75V – 3.63V, -40°C to +85°C, DC to 300 MHz
Communication Interfaces- Up to 10 Serial
Communication Interfaces (SERCOM), USART, I2C, SPI
:
- 16 byte
transmit receive buffers
- Baud Rate
generator (BRG)
- Can be
used with DMA
- UART
- Supports
LIN 2.1 and IrDA® protocols
- ISO-7816
UART
- RS485
- USART
with full-duplex and single-wire half-duplex
configuration
- Up to 2
SPI/I2S/I8S modules:
- 3-wire
SPI™ (supports all 4 SPI modes)
- 4-wire
Framed SPI modes
- Audio
Codec Protocols (I2S, Left/Right Justified
and PCM/DSP, I8S, Am824 )
- 4x32-bit,
8x16-bit or 16x8-bit FIFO
- 2 modules support 50MHz SCK
- Modulation for MEMS microphone
- Up to 2 SQI
(Serial Quad Interface)
- Up to 40
Mbps/80 MHz Operation
- 1 data
lane Full Duplex (also known as SPI)
- 2 or 4
data lane Half Duplex
- Dedicated
descriptor based DMA
- Up to
2-chip selects
- Up to six CAN
ports with dedicated DMA channel supporting CAN 2.0 A/B and ISO
CAN-FD
- One Ethernet MAC
(GMAC/ETH) 10/100/1000 Mbps in GMII, MII, and RMII with
dedicated DMA. IEEE®1588 PTP frames and 802.3az
Energy-efficiency support. Ethernet AVB support with IEEE802.1AS
Timestamping and IEEE802.1Qav credit-based traffic-shaping
hardware support
- Up to two
High-Speed/Full-Speed/Low-Speed USB 2.0 port with 8 dedicated
DMA channels
- One Media Local
Bus Controller
- 3-wire
mode
- Up to
1024 x Fs speed,
- EBI 16-bit
External Bus Interface - Static Memory Controller
| Hardware Security Module (HSM):- Overview:
- Dedicated
Secure Subsystem that supports the following
cryptography: AES, TDES, ChaCha20, SHA-2, SHA-1,
Poly1305, RSA and ECC.
- Secure
boot support for main/host CPU: Validation of host code
image and host code signature validation.
- Secure
update support for host code: Secure encryption key
storage and image decryption.
- Hardware
Acceleration:
- AES-128,
AES-192, and AES-256: Fully compliant with NIST FIPS
197.
- ECB, CBC,
CFB, OFB, CTR, GCM, CCM, XTS, CMAC modes.
- Triple
DES support with up to 168-bit Key Length.
- HASH/MAC
- MD-5,
SHA-1, SHA-256, SHA-224, SHA-384, SHA-512, and SHA3
capability.
- ChaCha20-Poly1305 Authenticated Encryption.
- Key
Derivation Function (HKDF, KDF2…)
- Public
Key Cryptography: RSA, DSA, and ECC.
- RSA
with/without Chinese Remainder Theorem (CRT). Up to
4096-bit Key length.
- ECC with
ECC-GF(p), ECC-GF(2m), and ECDSA support.
- Prime
Field P-192, P-224, P-256, P-384, P-521.
- Binary
Field K-163, K-233, K-283, K-409, K-571.
- Binary
Field B-163, B-233, B-283, B-409, B-571.
- P-224,
P-256, P-384, and P-521 Elliptic Curve – ECDSA
Sign/Verify.
- DSA
support up to 2048-bit Key Length.
- True
Random Number Generator (TRNG.)
- Dedicated
RTC for the Hardware Security Module (HSM) with User
Selectable Tamper Inputs
- Backup
registers
- TrustRAM
- Up to 8 KB backup SRAM with ECC
|
300 MHz Arm® Cortex®-M7- Superscaler pipeline: 6 stages with branch prediction
- L1 Cache - 16 KB each of ECC protected instruction and data
cache
- Up to 256 Kb of
Tightly Coupled Memory (TCM): 128 KB each of ECC protected
Instruction and Data TCM
- Memory Protection Unit (MPU) - 8 regions
- Floating Point Unit (FPU) - Double and Single Precision (32 bit
and 64 bit)
- Multiply Accumulate Unit (MAC) - Single Cycle throughput
- DSP Thumb®-2 compliant instruction set
Clock Management- 32.768 kHz
ultra-low power internal oscillator
- Clock failure detection event routed to normal interrupt or to
the Non-Maskable Interrupt (NMI) controller:
- CPU Frequency Monitor
- Main Crystal Oscillator Failure Detection
- 32.768 kHz Crystal Oscillator Frequency Monitor
- Independent Watchdog Timer (WDT)
- Precision 48 MHz trimmed internal RC oscillator
- Up to two PLL for system clock, and one PLL for USB high-speed
operations
- FREQM - Frequency meter
| I/O - High-Current Sink/Source Pins Available
- Configurable Open-Drain Output on Digital I/O pins
- Configurable internal pull-up/pull-down resistors
- 5V Tolerant Input Pins (digital pins only)
Power Management- Power-on Reset
(POR) and Brown-out Reset (BOR)
- Multiple power management modes: Idle, Stand-by, Hibernate,
Backup, and Off modes
- Ultra low-power Real Time Clock (RTC) and Real-time Timer
(RTT)
- RTC with Gregorian calendar and UTC mode, waveform
generation in low-power modes
- RTC counter trim calibration circuitry to compensate for
32.768 kHz crystal frequency variations
Memories- 8 MB, 4 MB, 2 MB in-system self-programmable Flash with:
- Error
Correction Code (ECC = Flash, SRAM, TrustRAM, Cache, and
TCM)
- Dual bank with Read-While-Write (RWW) support (Live
Update)
- Up to 4 KB of Emulated User OTP Memory.
- Additional 2x 80 KB of Boot Flash Memory (2x24 pages)
- 1 MB and 512k
SRAM Main Memory with ECC
- Up to 256 KB of Tightly Coupled Memory (TCM) with ECC
- Up to 8 KB additional SRAM
- Can be retained in Backup mode
- Eight 32-bit backup registers
|
High-Performance Peripherals- 16-Channel
hardware DMA controller with Automatic Data Size Detection
- Linked
list scatter/gather operation
- Up to 64
Kb transfers per descriptor
- 32-bit
CRC
- Up to 10
Timer/Counter Capture (TCC)/output compares
- 10 Input
Capture modules
- 10 Output
Compare/PWM modules
- Up to 2 SD (HC)
Memory Card Interfaces (SDHC)
- Up to 50
MHz operation
- 4-bit or
1-bit Interface
- Compatibility with SD and SDHC Memory Card
Specification Version 3.01
- Compatibility with SDIO specification version 3.0
- Compliant
with JDEC specification, MMC memory cards V4.51
- 16-bit External
Bus I/F - Static Memory Controller (EBI-SMC)
- Support
for SRAM, PSRAM, LCD module, Flash
Debugger Development Support- Embedded Trace
Module with instruction trace stream
- Instruction Debug
Trace Port Interface Unit
- 2-wire Serial
Wire Debug Interface
- 4-Wire JTAG
Scan/Debug Interface
Software and Tools Support: Develop Prototypes Quickly with Our
Powerful, Easy-to-Use Ecosystem- Get code off to a
head start with MPLAB® Code Configurator
- Graphically configure peripherals, software libraries, and
supported RTOS with MPLAB Harmony
- Download MPLAB XC Compiler
- Take advantage of MPLAB X IDE’s support for 32-bit MCUs
- Select the best debugger for the project: MPLAB ICE, ICD, or
PICkit™
| Analog Peripherals- Four 12-bit SAR
ADC Modules with Dedicated S&H Circuits
- 16
external analog inputs and 3 dedicated internal analog
inputs
- Up to
4.6875 Msps conversion rate in 12- bit mode
- Up to 15
Msps conversion rate using multi-core interleaving
- Can
operate during Standby and Idle modes
- ADC
digital comparator
- Two analog
comparators
- Differential inputs
- Rail-to-rail operation
- Four
selectable hysteresis, 10, 20, 40, and 60 mv
- Programmable 7-bit DAC reference voltage
- Peripheral
Capacitive Touch Controller (PTC)
- Up to 32
Self Capacitance Channels/Sensors
- Up to 16
Mutual Capacitance Channels/Sensors
- Integrated
Temperature sensor
Qualifications and Hardware Safety Feature- Normal or
Non-Maskable Interrupt Power failure detection events
- I/O
Voltage Programmable Supply Monitor
- Core
Voltage Programmable Supply Monitor
- Write protection
registers on selected peripherals
- ECC w/Fault
Injection
- Global mBIST
- Clock Fail
Detection with fail safe internal RC Oscillator
|
