42.11 10-Bit Analog-to-Digital Converter (ADC) Graphs Figure 42-62. ADC DNL vs ADC Code (VDD = 3.0V, TAD = 1 μs) Figure 42-63. ADC DNL vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 42-64. ADC DNL vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 42-65. ADC INL vs ADC Code (VDD = 3.0V, TAD = 1 μs) Figure 42-66. ADC INL vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 42-67. ADC INL vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 42-68. ADC Gain Error vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 42-69. ADC Gain Error vs VREF+ (TAD = 1 μs, CPON = 'b11) Figure 42-70. ADC Offset Error vs TAD (VREF+ = VDD = 3.0V, CPON = 'b11) Figure 42-71. ADC Offset Error vs VREF+ (TAD = 1 μs, CPON = 'b11)