42.4 VIH - VIL Graphs

Figure 42-24. Input Pin with TTL Buffer Minimum VIH vs VDD
Figure 42-25. Input Pin with TTL Buffer Maximum VIL vs VDD
Figure 42-26. Input Pin with Schmitt Trigger Minimum VIH vs VDD
Figure 42-27. Input Pin with Schmitt Trigger Maximum VIL vs VDD
Figure 42-28. Input Pin with SMBus 2.0 Minimum VIH vs VDD
Figure 42-29. Input Pin with SMBus 2.0 Maximum VIL vs VDD
Figure 42-30. Input Pin with SMBus 3.0 Minimum VIH vs VDD
Figure 42-31. Input Pin with SMBus 3.0 Maximum VIL vs VDD
Figure 42-32. Input Pin with I2C Trigger Minimum VIH vs VDD
Figure 42-33. Input Pin with I2C Trigger Maximum VIL vs VDD