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tinyAVR® 2 Family ATtiny3224/3226/3227
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31
UPDI - Unified Program and Debug Interface
31.3
Functional Description
ATtiny3224/3226/3227
Introduction
tinyAVR® 2 Family Overview
Features
1
Block Diagram
2
Pinout
3
I/O Multiplexing and Considerations
4
Hardware Guidelines
5
Conventions
6
AVR® CPU
7
Memories
8
Peripherals and Architecture
9
General Purpose I/O Registers
10
NVMCTRL - Nonvolatile Memory Controller
11
CLKCTRL - Clock Controller
12
SLPCTRL - Sleep Controller
13
RSTCTRL - Reset Controller
14
CPUINT - CPU Interrupt Controller
15
EVSYS - Event System
16
PORTMUX - Port Multiplexer
17
PORT - I/O Pin Configuration
18
BOD - Brown-out Detector
19
VREF - Voltage Reference
20
WDT - Watchdog Timer
21
TCA - 16-bit Timer/Counter Type A
22
TCB - 16-Bit Timer/Counter Type B
23
RTC - Real-Time Counter
24
USART - Universal Synchronous and Asynchronous Receiver and Transmitter
25
SPI - Serial Peripheral Interface
26
TWI - Two-Wire Interface
27
CRCSCAN - Cyclic Redundancy Check Memory Scan
28
CCL - Configurable Custom Logic
29
AC - Analog Comparator
30
ADC - Analog-to-Digital Converter
31
UPDI - Unified Program and Debug Interface
31.1
Features
31.2
Overview
31.3
Functional Description
31.3.1
Principle of Operation
31.3.2
Operation
31.3.3
UPDI Instruction Set
31.3.4
CRC Checking of Flash During Boot
31.3.5
System Clock Measurement with UPDI
31.3.6
Inter-Byte Delay
31.3.7
System Information Block
31.3.8
Enabling of Key Protected Interfaces
31.3.9
Events
31.3.10
Sleep Mode Operation
31.4
Register Summary
31.5
Register Description
32
Instruction Set Summary
33
Electrical Characteristics
34
Typical Characteristics
35
Ordering Information
36
Package Drawings
37
Data Sheet Revision History
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31.3 Functional Description
