Programming Overview
This document defines the programming specification for the dsPIC33AK512MC510 and dsPIC33AK512MPS512 Digital Signal Controller (DSC) devices:
                                
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The programming is implemented via the In-Circuit Serial Programming™ (ICSP™) interface, which includes the clock and data pins (PGECx and PGEDx).
The dsPIC33AK512MC510 and dsPIC33AK512MPS512 devices have a
            Nonvolatile Memory (NVM) controller module. This NVM module performs the device Flash
            memory programming. Its operation is configured and managed by the CPU. The external
            programmer tool uses the serial programming interface (ICSP) to shift in and execute CPU
            instructions, move data in and out of the device, and configure the NVM controller for
            programming operations. The programmer sends MOV instructions to the
            CPU to store (prepare) the Flash data to be programmed in the device RAM, or NVM control
            registers, depending on the Programming mode. Then, the programmer executes CPU
            instructions to initiate an erase or write operation using the NVM controller. To read
            Flash data from the device, a VISI register is implemented. The content of this register
            can be shifted out to the ICSP interface. For fast Flash content verification, the NVM
            controller supports a CRC-32 checksum engine. It can reduce the amount of data which
            should be read over the ICSP communications pins. Figure  explains the interactions between the programmer and device.
