2.1.1 JTAG Pinout

This is the target reference voltage.

It is used to check if the target has power, to create the logic-level reference for the input comparators and controls the output logic levels to the target. It is normally fed from V_DD on the target board and must not have a series resistor.

This pin is not connected in SAM-ICE. It is reserved for compatibility with other equipment. Connect to V_DD or leave open in target system.

JTAG Reset. Output from SAM-ICE to the Reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection.

JTAG data input of the target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU.

Common ground

JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU.

Common ground

JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU.

Common ground

Input Return test clock signal from the target. Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, a returned and re-timed TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking, which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND.

Common ground

JTAG data output from target CPU. Typically connected to TDO on target CPU.

Common ground

Target CPU reset signal

Common ground

This pin is not connected in SAM-ICE

Common ground

This pin is not connected in SAM-ICE

Common ground