2.1 ADCON2 (Register 23-3)

Register 23-3 (ADCON2) is missing Note 2 pertaining to the configuration of the A/D Acquisition Time Selection bits. The updated register notes are shown below with Note 2 highlighted in bold:

Note:
  1. If the A/D FRC clock source is selected, a delay of one TCY (instruction cycle) is added before the A/D clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
  2. When ACQT[2:0] = 'b000, ADC saturation may occur due to the short period of discharge time. Use ACQT[2:0] != 'b000 to improve this situation for accurate measurement.