1.4.4 Setting the CLKSEL Bit of CIOCON Can Occasionally Lead to Missed Incoming CAN Messages

A very small number of CAN applications are experiencing a low failure rate when the microcontroller core is clocked by an oscillator through a PLL (either the PLLCFG bit is cleared or PLLEN bit of OSCTUNE is set) and the ECAN module is clocked by the same source without a PLL (the CLKSEL bit of CIOCON is set). This failure mechanism is characterized by incoming CAN messages rarely being missed, with the ECAN module acknowledging the incoming message on the bus but not triggering interrupts or transferring the incoming data into the receive buffers.

Work around

If it is essential that the application never misses a message, it is recommended that both the ECAN module and the microcontroller be clocked either through the PLL or without a PLL. This can be achieved by ensuring that the CLKSEL bit of CIOCON remains cleared.

Affected Silicon Revisions

A2A3A4A6A7
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