Introduction

The Libero® system-on-chip (SoC) v2021.3 unified design suite is Microchip’s flagship FPGA software for designing with Microchip’s latest power efficient Flash FPGAs, SoC FPGAs, and rad-tolerant (RT) FPGAs. The suite integrates industry-standard Synopsys Synplify Pro synthesis and Mentor Graphics Modelsim Pro simulation with best-in-class constraints management, debug capabilities, and secure production programming support.

Use Libero SoC v2021.3 to design with the following Microchip FPGAs:

To design with Microchip’s older Flash FPGA families, use Libero SoC v11.9 and its subsequent service packs.

To access data sheets, user guides, training resources, software downloads, libraries, and application notes, visit www.microchip.com, and click Resources.

Note: Libero SoC v2021.3 does not support Classic Constraint Flow. IGLOO2, SmartFusion2, and RTG4 projects using the “Classic” flow cannot be opened in this release. For information about how to migrate Classic Constraint Flow projects to the Enhanced Constraint Flow, refer to Migrating an Existing Project Created with Classic Constraint Flow to Enhanced Constraint Flow.