3.4.1 Sleep Modes

A clarification for the selection of the appropriate sleep modes and their wake-up sources has been made.

Figure “Clock Distribution” presents the different clock systems in the ATmega48PA/88PA/168PA Automotive and their distribution. The figure helps select an appropriate sleep mode. The table below shows the various sleep modes and their wake-up sources BOD disable ability.

Table 3-1. Active Clock Domains and Wake-Up Sources in the Different Sleep Modes
Sleep Mode	Active Clock Domains					Oscillators		Wake-Up Sources							Software  BOD Disable
Sleep Mode	clk_CPU	clk_FLASH	clk_IO	clk_ADC	clk_ASY	Main Clock  Source Enabled	Timer Oscillator  Enabled	INT and PCINT	TWI Address  Match	Timer2	SPM/EEPROM  Ready	ADC	WDT	Other I/O	Software  BOD Disable
Idle			X	X	X	X	X⁽²⁾	X	X	X	X	X	X	X
ADC Noise  Reduction				X	X	X	X⁽²⁾	X	X	X⁽²⁾	X	X	X
Power-Down								X	X				X		X
Power-Save					X		X⁽²⁾	X	X	X			X		X
Standby⁽¹⁾						X		X	X				X		X
Extended Standby					X⁽²⁾	X	X⁽²⁾	X	X	X			X		X

Note:

Only recommended with an external crystal or resonator selected as the clock source.
If Timer/Counter2 is running in Asynchronous mode.

Write the SE bit in the Sleep Mode Control (SMCR) register to logic one, and execute a SLEEP instruction to enter any six sleep modes. The SM2, SM1, and SM0 bits in the SMCR register select which sleep mode (Idle, ADC Noise Reduction, Power-Down, Power-Save, Standby, or Extended Standby) to be activated by the SLEEP instruction. See Table “Sleep Mode Select” for a summary.

If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruction following SLEEP. The register file and SRAM contents are unaltered when the device wakes up from a sleep mode. If a reset occurs during a sleep mode, the MCU wakes up and executes from the Reset Vector.