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Ultra-Low Power Arm® ARM926EJ-S™ Processor-Based MPU, 600 MHz, Camera, LCD, 2D Graphics, Dual 10/100 Ethernet, CAN, USB, QSPI, FLEXCOMs, AES, SHA
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Product Pages
SAM9X60
Home
7
Security and Cryptography Subsystem
7.2
Advanced Encryption Standard (AES)
7.2.4
Functional Description
7.2.4.11
Security Features
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
7.1
Overview
7.2
Advanced Encryption Standard (AES)
7.2.1
Description
7.2.2
Embedded Characteristics
7.2.3
Product Dependencies
7.2.4
Functional Description
7.2.4.1
AES Register Endianness
7.2.4.2
Operating Modes
7.2.4.3
Last Output Data Mode (CBC-MAC)
7.2.4.4
Galois/Counter Mode (GCM)
7.2.4.5
XEX-based Tweaked-codebook Mode (XTS)
7.2.4.6
Double Input Buffer
7.2.4.7
Temporary Secured Storage for Keys
7.2.4.8
Start Modes
7.2.4.9
Automatic Padding Mode
7.2.4.10
Secure Protocol Layers Improved Performances
7.2.4.11
Security Features
7.2.4.11.1
Private Key Bus
7.2.4.11.2
Unspecified Register Access Detection
7.2.4.11.3
Clearing Key on Tamper Event
7.2.4.11.4
Register Write Protection
7.2.4.11.5
Security and Safety Analysis and Reports
7.2.5
Register Summary
7.3
Secure Hash Algorithm (SHA)
7.4
Triple Data Encryption Standard (TDES)
7.5
Random Number Generator (TRNG)
8
Connectivity Subsystem
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
7.2.4.11 Security Features
