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Ultra-Low Power Arm® ARM926EJ-S™ Processor-Based MPU, 600 MHz, Camera, LCD, 2D Graphics, Dual 10/100 Ethernet, CAN, USB, QSPI, FLEXCOMs, AES, SHA
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Product Pages
SAM9X60
Home
2
CPU and Interconnect
2.4
DMA Controller (XDMAC)
2.4.5
Functional Description
2.4.5.2
Data Striding Diagram
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
2.1
ARM926EJ-S Processor
2.2
Debug and Test
2.3
Bus Matrix (MATRIX)
2.4
DMA Controller (XDMAC)
2.4.1
Description
2.4.2
Embedded Characteristics
2.4.3
Block Diagram
2.4.4
DMA Controller Peripheral Connections
2.4.5
Functional Description
2.4.5.1
Basic Definitions
2.4.5.2
Data Striding Diagram
2.4.5.3
Transfer Hierarchy Diagrams
2.4.5.4
Peripheral Synchronized Transfer
2.4.5.5
XDMAC Transfer Software Operation
2.4.6
Linked List Descriptor Operation
2.4.7
XDMAC Maintenance Software Operations
2.4.8
XDMAC Software Requirements
2.4.9
Register Summary
2.5
Boot Strategies
3
Memories
4
System Controller
5
Image Subsystem
6
Audio Subsystem
7
Security and Cryptography Subsystem
8
Connectivity Subsystem
9
USB Subsystem
10
Electrical and Mechanical Characteristics
11
Revision History
Microchip Information
2.4.5.2 Data Striding Diagram
Figure 2-5.
Data Striding Diagram
