3.3 External Reset

A debugger can pull the external Reset pin low to reset the device. (The MCLR pin of the device must be pulled to a logic low level for 3 μS minimum pulse width).

Note: The SWCLK pins must not be pulled low by the debugger when the MCLR pin rises; it triggers a CPU Reset Extension (see CPU Reset Extension).

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.