Features

  • Processor:
    • ARM Cortex -M0+ CPU running at up to 48 MHz (2.46CoreMark®/MHz)
      • Single-cycle hardware multiplier
      • Micro Trace Buffer (MTB)
  • Memory:
    • In-system self-programmable 256 KB Flash memory
    • 32 KB Static Random Access Memory (SRAM)
    • 8 KB low power SRAM memory
  • System:
    • Power-on Reset (POR) and Brown-out Reset (BOR)
    • Internal and external clock options with 48 MHz Digital Frequency Locked Loop (DFLL48M) and 48 MHz to 96 MHz Fractional Digital Phase Locked Loop (FDPLL96M)
    • External Interrupt Controller (EIC)
    • Up to 15 external interrupts
    • One Non-Maskable Interrupt (NMI)
    • 2-pin Serial Wire Debug (SWD) programming, test and debugging interface
  • Operating Voltage: 1.8V – 3.5V
  • Low Power Consumption
    • Transceiver:
      • RX = 12.64 mA (typical)
      • RFO_HF = 41.54 mA (typical)
      • PA_BOOST = 114.68 mA (typical)
    • MCU:
      • Standby and Backup Sleep modes
      • SleepWalking peripherals
  • Temperature Range: −40°C to +85°C (Industrial)

RF/Analog Features

  • Integrated LoRa Technology Transceiver:
    • 863 MHz to 928 MHz dual-band coverage
    • +18.59 dBm maximum power (VCC > 2.4 VDC)
  • High Sensitivity:
    • -136 dBm (LoRaWAN® protocol compliant modes)
  • Up to 154.59 dB Maximum Link Budget
  • Robust Front-end: IIp3 = -11 dBm
  • Excellent Blocking Immunity
  • Fully Integrated Synthesizer with a Resolution of 61 Hz
  • LoRa Technology and (G)FSK Modulations
  • Preamble Detection
  • 127 dB Dynamic Range RSSI
  • Automatic RF Sense and Channel Activity Detection (CAD) with Ultra-Fast Automatic Frequency Control (AFC)
  • Packet Engine up to 256 Bytes with Cyclic Redundancy Check (CRC)

Peripheral Information

  • 16-Channel Direct Memory Access Controller (DMAC)
  • 12-Channel Event System
  • Three 16-bit Timer/Counters (TC), Configurable as Either of the Following:
    • One 8-bit TC with compare/capture channels
    • One 16-bit TC with compare/capture channels
    • One 32-bit TC with compare/capture channels, by using two TCs
  • Two 24-bit and one 16-bit Timer/Counters for Control (TCC), with Extended Functions:
    • Up to four compare channels with optional complementary output
    • Generation of synchronized Pulse Width Modulation (PWM) pattern across port pins
    • Deterministic fault protection, fast decay and configurable dead-time between complementary output
    • Dithering that increases resolution with up to five bit and reduces quantization error
  • 32-Bit Real Time Counter (RTC) with Clock/Calendar Function
  • Watch-dog Timer (WDT)
  • CRC-32 Generator
  • One Full-speed (12 Mbps) Universal Serial Bus (USB) 2.0 Interface:
    • Embedded host and device function
    • Eight endpoints
  • Up to Four Serial Communication Interfaces (SERCOM) Including One Low-Power SERCOM (SERCOM5(3)), Each Configurable to Operate as Either of the Following:
    • USART with full-duplex(1) or single-wire half-duplex configuration
    • I2C up to 3.4 MHz(2)
    • Serial Peripheral Interface (SPI)
    • Local Interconnect Network (LIN) slave
  • One 12-bit, 1 Msps Analog-To-Digital Converter (ADC) with up to Seven External Channels:
    • Differential and single-ended input
    • Automatic offset and gain error compensation
    • Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
  • Two Analog Comparators (AC) with Window Compare Function
  • Peripheral Touch Controller (PTC)
    • 12-channel capacitive touch and proximity sensing
  • 23 Programmable I/O Pins
Note:
  1. SERCOM2 has only 2 interface lines for use so it can be used only for single-wire half-duplex configuration. USART Full duplex and SPI modes are not supported.
  2. I2C support is available only in PA16, PA17, PA22 and PA23 pins.
  3. SERCOM5, due to its location in Power Domain (PD0) in SAM L21, has a reduced feature set and does not support the following features:
    • DMA support
    • USART:
      • 3x or 8x oversampling
      • Flow control (RTS/CTS)
      • IrDA
      • Single wire UART according to EN54
      • Start of Frame (SOF)/End of Frame (EOF) function
    • I2C:
      • Fast mode plus (Fm+) and High-speed (Hs) mode
      • SMBus Serial Clock Low (SCL) timeout
      • 10-bit addressing
      • Power Management Bus (PMBus) group command support
    • SPI:
      • Hardware chip select
      • Wake on Slave Select (SS) assertion