In One Ramp mode, TCD counter counts up until it reaches the CMPBCLR value. Then the
TCD cycle is done and the counter restarts from 0x000, beginning a new TCD cycle. The
TCD cycle period is:
Figure 23-3. One Ramp Mode
In the figure above, CMPASET < CMPACLR < CMPBSET < CMPBCLR.
This is required in One Ramp mode to avoid overlapping outputs. The figure below is an
example where CMPBSET < CMPASET < CMPACLR < CMPBCLR, resulting in an
overlap of the outputs. Figure 23-4. One Ramp Mode with CMPBSET
< CMPASETIf any of the other compare values are bigger than CMPBCLR it will never be
triggered when running in One Ramp mode, and if the CMPACLR is smaller than the CMPASET
value, the clear value will not have any effect.
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