28.3.1 Initialization

To enable a CRC in software (or via the debugger):
  1. Write the Source (SRC) bit field of the Control B register (CRCSCAN.CTRLB) to select the desired source settings. Ensure that the MODE bit field in CRCSCAN.CTRLB is 0x0.
  2. Enable the CRCSCAN by writing a '1' to the ENABLE bit in the Control A register (CRCSCAN.CTRLA).
  3. The CRC will start after three cycles, and the CPU will continue executing during these three cycles.

The CRCSCAN can be enabled during the internal Reset initialization to ensure the Flash is OK before letting the CPU execute code. If the CRCSCAN fails during the internal Reset initialization, the CPU is not allowed to start normal code execution - the device remains in Reset state instead of executing code with unexpected behavior. The full source settings are available during the internal Reset initialization. See the Fuse description for more information.

If the CRCSCAN was enabled during the internal Reset initialization, the CRC Control A and B registers will reflect this when normal code execution is started:
  • The ENABLE bit in CRCSCAN.CTRLA will be '1'
  • The MODE bit field in CRCSCAN.CTRLB will be non-zero
  • The SRC bit field in CRCSCAN.CTRLB will reflect the checked section(s).

The CRCSCAN can be enabled during Reset by configuring the CRCSRC fuse in FUSE.SYSCFG0.