4.3.1 Target Digital I/O

The J200 and J201 headers provide access to the ATmega328P digital I/O pins.

Table 4-1. J200 Digital I/O High Byte Header
J200 PinATmega328P PinFunction
1PB0
2PB1
3PB2SS, SPI Bus Master Slave select
4PB3MOSI, SPI Bus Master Output/Slave Input
5PB4MISO, SPI Bus Master Input/Slave Output
6PB5SCK, SPI Bus Master Clock Input
7GND
8AREF
9PC4SDA, 2-wire Serial Bus Data Input/Output Line. Shared with ADC4.
10PC5SCL, 2-wire Serial Bus Clock Line. Shared with ADC5.
Table 4-2. J201 Digital I/O High Low Header
J201 PinATmega328P PinFunction
1PD0RXD (ATmega328P USART Input Pin)
2PD1TXD (ATmega328P USART Output Pin)
3PD2
4PD3
5PD4
6PD5
7PD6
8PD7