31.5.11 Command
| Name: | COMMAND |
| Offset: | 0x0A |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MODE[2:0] | START[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 6:4 – MODE[2:0] Mode
For more information on the operation modes, see the section Operation Modes and the section Accumulator Test within.
| Value | Name | Description |
|---|---|---|
| 0x0 | SINGLE_8BIT | Single conversion with 8-bit resolution |
| 0x1 | SINGLE_10BIT | Single conversion with 10-bit resolution |
| 0x2 | SERIES | Series with accumulation, separate trigger for every 10-bit conversion |
| 0x3 | BURST | Burst with accumulation. One trigger will run SAMPNUM 10-bit conversions in one sequence. |
| 0x7 | ACCTEST | Accumulator diagnostics mode for Functional Safety applications |
| Other | - | Reserved |
Bits 2:0 – START[2:0] Start Conversion
Note: If the ENABLE bit in ADCn.CTRLA is ‘
0’ when writing the START
bit field to IMMEDIATE, it will automatically be set to
STOP.| Value | Name | Description |
|---|---|---|
| 0x0 | STOP | Stop an ongoing conversion |
| 0x1 | IMMEDIATE | Start a conversion immediately. The bitfield value will be set back to STOP after the conversion is completed unless Free-Running mode is enabled |
| 0x2 | MUXPOS_WRITE | Start when a write to the MUXPOS register is done |
| 0x4 | EVENT_TRIGGER | Start when an event is received by the ADC |
| Other | - | Reserved |
