2.3 Sequential Logic

Each LUT pair can be connected to an internal sequential logic. The sequential selection bits, SEQSEL in the Sequential Control register, select between the different blocks available. Sequential logic can be used to achieve more complex functionality in the CCL.

The CCL has the following sequential logic blocks:

• Gated D Flip-Flop (DFF)
• JK Flip-Flop (JK)
• Gated D-Latch (DLATCH)
• RS Latch (RS)

In addition, a T Flip-Flop can be created using the JK Flip-Flop.

In Atmel Start it is possible to find application notes and code examples that use CCL and sequential logic. For example:

• AVR42779 Ultrasonic Distance Measurement