10.12 Power Control (PCONx) Register

The Power Control (PCONx) registers contain flag bits to differentiate between a:

  • Brown-out Reset (BOR)
  • Power-on Reset (POR)
  • RESET Instruction Reset (RI)
  • MCLR Reset (RMCLR)
  • Watchdog Timer Window Violation Reset (WDTWV)
  • Watchdog Timer Reset (RWDT)
  • Stack Underflow Reset (STKUNF)
  • Stack Overflow Reset (STKOVF)
  • Memory Violation Reset (MEMV)

Hardware will change the corresponding register bit during the Reset process; if the Reset was not caused by the condition, the bit remains unchanged.

Software may reset the bit to the Inactive state after restart (hardware will not reset the bit).

Software may also set any PCONx bit to the Active state, so that user code may be tested, but no Reset action will be generated.