43 Register Summary
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 | INDF0 | 7:0 | INDF0[7:0] | |||||||
0x01 | INDF1 | 7:0 | INDF1[7:0] | |||||||
0x02 | PCL | 7:0 | PCL[7:0] | |||||||
0x03 | STATUS | 7:0 | TO | PD | Z | DC | C | |||
0x04 | FSR0 | 7:0 | FSR0[7:0] | |||||||
15:8 | FSR0[15:8] | |||||||||
0x06 | FSR1 | 7:0 | FSR1[7:0] | |||||||
15:8 | FSR1[15:8] | |||||||||
0x08 | BSR | 7:0 | BSR[5:0] | |||||||
0x09 | WREG | 7:0 | WREG[7:0] | |||||||
0x0A | PCLATH | 7:0 | PCLATH[6:0] | |||||||
0x0B | INTCON | 7:0 | GIE | PEIE | INTEDG | |||||
0x0C | PORTA | 7:0 | RA7 | RA6 | RA5 | RA4 | RA3 | RA2 | RA1 | RA0 |
0x0D | PORTB | 7:0 | RB7 | RB6 | RB5 | RB4 | RB3 | RB2 | RB1 | RB0 |
0x0E | PORTC | 7:0 | RC7 | RC6 | RC5 | RC4 | RC3 | RC2 | RC1 | RC0 |
0x0F | PORTD | 7:0 | RD7 | RD6 | RD5 | RD4 | RD3 | RD2 | RD1 | RD0 |
0x10 | PORTE | 7:0 | RE3 | RE2 | RE1 | RE0 | ||||
0x11 | Reserved | |||||||||
0x12 | TRISA | 7:0 | TRISA7 | TRISA6 | TRISA5 | TRISA4 | TRISA3 | TRISA2 | TRISA1 | TRISA0 |
0x13 | TRISB | 7:0 | TRISB7 | TRISB6 | TRISB5 | TRISB4 | TRISB3 | TRISB2 | TRISB1 | TRISB0 |
0x14 | TRISC | 7:0 | TRISC7 | TRISC6 | TRISC5 | TRISC4 | TRISC3 | TRISC2 | TRISC1 | TRISC0 |
0x15 | TRISD | 7:0 | TRISD7 | TRISD6 | TRISD5 | TRISD4 | TRISD3 | TRISD2 | TRISD1 | TRISD0 |
0x16 | TRISE | 7:0 | Reserved | TRISE2 | TRISE1 | TRISE0 | ||||
0x17 | Reserved | |||||||||
0x18 | LATA | 7:0 | LATA7 | LATA6 | LATA5 | LATA4 | LATA3 | LATA2 | LATA1 | LATA0 |
0x19 | LATB | 7:0 | LATB7 | LATB6 | LATB5 | LATB4 | LATB3 | LATB2 | LATB1 | LATB0 |
0x1A | LATC | 7:0 | LATC7 | LATC6 | LATC5 | LATC4 | LATC3 | LATC2 | LATC1 | LATC0 |
0x1B | LATD | 7:0 | LATD7 | LATD6 | LATD5 | LATD4 | LATD3 | LATD2 | LATD1 | LATD0 |
0x1C | LATE | 7:0 | LATE2 | LATE1 | LATE0 | |||||
0x1D ... 0x8B | Reserved | |||||||||
0x8C | PIR0 | 7:0 | TMR0IF | IOCIF | INTF | |||||
0x8D | PIR1 | 7:0 | TMR1GIF | TMR1IF | OSFIF | CSWIF | ACTIF | SCANIF | CRCIF | NVMIF |
0x8E | PIR2 | 7:0 | CCP2IF | CCP1IF | TMR6IF | TMR4IF | TMR2IF | TMR3GIF | TMR3IF | |
0x8F | PIR3 | 7:0 | PWM4IF | PWM4PIF | PWM3IF | PWM3PIF | PWM2IF | PWM2PIF | PWM1IF | PWM1PIF |
0x90 | PIR4 | 7:0 | RC1IF | TX1IF | CLC4IF | CLC3IF | CLC2IF | CLC1IF | CWG1IF | NCO1IF |
0x91 | PIR5 | 7:0 | CM2IF | CM1IF | BCL2IF | SSP2IF | BCL1IF | SSP1IF | RC2IF | TX2IF |
0x92 | PIR6 | 7:0 | ZCDIF | ADTIF | ADIF | |||||
0x93 ... 0x95 | Reserved | |||||||||
0x96 | PIE0 | 7:0 | TMR0IE | IOCIE | INTE | |||||
0x97 | PIE1 | 7:0 | TMR1GIE | TMR1IE | OSFIE | CSWIE | ACTIE | SCANIE | CRCIE | NVMIE |
0x98 | PIE2 | 7:0 | CCP2IE | CCP1IE | TMR6IE | TMR4IE | TMR2IE | TMR3GIE | TMR3IE | |
0x99 | PIE3 | 7:0 | PWM4IE | PWM4PIE | PWM3IE | PWM3PIE | PWM2IE | PWM2PIE | PWM1IE | PWM1PIE |
0x9A | PIE4 | 7:0 | RC1IE | TX1IE | CLC4IE | CLC3IE | CLC2IE | CLC1IE | CWG1IE | NCO1IE |
0x9B | PIE5 | 7:0 | CM2IE | CM1IE | BCL2IE | SSP2IE | BCL1IE | SSP1IE | RC2IE | TX2IE |
0x9C | PIE6 | 7:0 | ZCDIE | ADTIE | ADIE | |||||
0x9D ... 0x010B | Reserved | |||||||||
0x010C | PMD0 | 7:0 | TMR0MD | CLKRMD | IOCMD | ACTMD | SYSCMD | SCANMD | CRCMD | NVMMD |
0x010D | PMD1 | 7:0 | PWM1MD | CCP2MD | CCP1MD | TMR6MD | TMR4MD | TMR2MD | TMR3MD | TMR1MD |
0x010E | PMD2 | 7:0 | CLC3MD | CLC2MD | CLC1MD | CWG1MD | NCO1MD | PWM4MD | PWM3MD | PWM2MD |
0x010F | PMD3 | 7:0 | CM2MD | CM1MD | FVRMD | MSSP2MD | MSSP1MD | UART2MD | UART1MD | CLC4MD |
0x0110 | PMD4 | 7:0 | ZCDMD | OPA1MD | DAC2MD | DAC1MD | ADCMD | |||
0x0111 ... 0x018B | Reserved | |||||||||
0x018C | WDTCON0 | 7:0 | PS[4:0] | SEN | ||||||
0x018D | WDTCON1 | 7:0 | CS[2:0] | WINDOW[2:0] | ||||||
0x018E | WDTPSL | 7:0 | PSCNTL[7:0] | |||||||
0x018F | WDTPSH | 7:0 | PSCNTH[7:0] | |||||||
0x0190 | WDTTMR | 7:0 | TMR[4:0] | STATE | PSCNT[17:16] | |||||
0x0191 | BORCON | 7:0 | SBOREN | BORRDY | ||||||
0x0192 | PCON0 | 7:0 | STKOVF | STKUNF | WDTWV | RWDT | RMCLR | RI | POR | BOR |
0x0193 | PCON1 | 7:0 | MEMV | |||||||
0x0194 ... 0x019B | Reserved | |||||||||
0x019C | TMR0L | 7:0 | TMR0L[7:0] | |||||||
0x019D | TMR0H | 7:0 | TMR0H[7:0] | |||||||
0x019E | T0CON0 | 7:0 | EN | OUT | MD16 | OUTPS[3:0] | ||||
0x019F | T0CON1 | 7:0 | CS[2:0] | ASYNC | CKPS[3:0] | |||||
0x01A0 ... 0x020B | Reserved | |||||||||
0x020C | FVRCON | 7:0 | EN | RDY | TSEN | TSRNG | CDAFVR[1:0] | ADFVR[1:0] | ||
0x020D | CPCON | 7:0 | CPON[1:0] | CPOS | CPREQ | CPT | CPRDY | |||
0x020E ... 0x021E | Reserved | |||||||||
0x021F | ZCDCON | 7:0 | SEN | OUT | POL | INTP | INTN | |||
0x0220 ... 0x028B | Reserved | |||||||||
0x028C | CPUDOZE | 7:0 | IDLEN | DOZEN | ROI | DOE | DOZE[2:0] | |||
0x028D | OSCCON1 | 7:0 | NOSC[2:0] | NDIV[3:0] | ||||||
0x028E | OSCCON2 | 7:0 | COSC[2:0] | CDIV[3:0] | ||||||
0x028F | OSCCON3 | 7:0 | CSWHOLD | SOSCPWR | ORDY | NOSCR | ||||
0x0290 | OSCSTAT | 7:0 | EXTOR | HFOR | MFOR | LFOR | SOR | ADOR | SFOR | PLLR |
0x0291 | OSCEN | 7:0 | EXTOEN | HFOEN | MFOEN | LFOEN | SOSCEN | ADOEN | PLLEN | |
0x0292 | OSCTUNE | 7:0 | TUN[5:0] | |||||||
0x0293 | OSCFRQ | 7:0 | FRQ[2:0] | |||||||
0x0294 | ACTCON | 7:0 | ACTEN | ACTUD | ACTLOCK | ACTORS | ||||
0x0295 | Reserved | |||||||||
0x0296 | CLKRCON | 7:0 | EN | DC[1:0] | DIV[2:0] | |||||
0x0297 | CLKRCLK | 7:0 | CLK[3:0] | |||||||
0x0298 ... 0x030B | Reserved | |||||||||
0x030C | TMR1 | 7:0 | TMR1[7:0] | |||||||
15:8 | TMR1[15:8] | |||||||||
0x030E | T1CON | 7:0 | CKPS[1:0] | SYNC | RD16 | ON | ||||
0x030F | T1GCON | 7:0 | GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||
0x0310 | T1GATE | 7:0 | GSS[4:0] | |||||||
0x0311 | T1CLK | 7:0 | CS[4:0] | |||||||
0x0312 | TMR3 | 7:0 | TMR3[7:0] | |||||||
15:8 | TMR3[15:8] | |||||||||
0x0314 | T3CON | 7:0 | CKPS[1:0] | SYNC | RD16 | ON | ||||
0x0315 | T3GCON | 7:0 | GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||
0x0316 | T3GATE | 7:0 | GSS[4:0] | |||||||
0x0317 | T3CLK | 7:0 | CS[4:0] | |||||||
0x0318 ... 0x038B | Reserved | |||||||||
0x038C | T2TMR | 7:0 | T2TMR[7:0] | |||||||
0x038D | T2PR | 7:0 | T2PR[7:0] | |||||||
0x038E | T2CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
0x038F | T2HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
0x0390 | T2CLKCON | 7:0 | CS[3:0] | |||||||
0x0391 | T2RST | 7:0 | RSEL[4:0] | |||||||
0x0392 | T4TMR | 7:0 | T4TMR[7:0] | |||||||
0x0393 | T4PR | 7:0 | T4PR[7:0] | |||||||
0x0394 | T4CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
0x0395 | T4HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
0x0396 | T4CLKCON | 7:0 | CS[3:0] | |||||||
0x0397 | T4RST | 7:0 | RSEL[4:0] | |||||||
0x0398 | T6TMR | 7:0 | T6TMR[7:0] | |||||||
0x0399 | T6PR | 7:0 | T6PR[7:0] | |||||||
0x039A | T6CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
0x039B | T6HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
0x039C | T6CLKCON | 7:0 | CS[3:0] | |||||||
0x039D | T6RST | 7:0 | RSEL[4:0] | |||||||
0x039E ... 0x040B | Reserved | |||||||||
0x040C | CCPR1 | 7:0 | CCPR[7:0] | |||||||
15:8 | CCPR[15:8] | |||||||||
0x040E | CCP1CON | 7:0 | EN | OUT | FMT | MODE[3:0] | ||||
0x040F | CCP1CAP | 7:0 | CTS[3:0] | |||||||
0x0410 | CCPR2 | 7:0 | CCPR[7:0] | |||||||
15:8 | CCPR[15:8] | |||||||||
0x0412 | CCP2CON | 7:0 | EN | OUT | FMT | MODE[3:0] | ||||
0x0413 | CCP2CAP | 7:0 | CTS[3:0] | |||||||
0x0414 ... 0x041E | Reserved | |||||||||
0x041F | CCPTMRS0 | 7:0 | C2TSEL[1:0] | C1TSEL[1:0] | ||||||
0x0420 ... 0x048B | Reserved | |||||||||
0x048C | PWM1ERS | 7:0 | ERS[3:0] | |||||||
0x048D | PWM1CLK | 7:0 | CLK[3:0] | |||||||
0x048E | PWM1LDS | 7:0 | LDS[2:0] | |||||||
0x048F | PWM1PR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x0491 | PWM1CPRE | 7:0 | CPRE[7:0] | |||||||
0x0492 | PWM1PIPOS | 7:0 | PIPOS[7:0] | |||||||
0x0493 | PWM1GIR | 7:0 | S1P2 | S1P1 | ||||||
0x0494 | PWM1GIE | 7:0 | S1P2 | S1P1 | ||||||
0x0495 | PWM1CON | 7:0 | EN | LD | ERSPOL | ERSNOW | ||||
0x0496 | PWM1S1CFG | 7:0 | POL2 | POL1 | PPEN | MODE[2:0] | ||||
0x0497 | PWM1S1P1 | 7:0 | P1[7:0] | |||||||
15:8 | P1[15:8] | |||||||||
0x0499 | PWM1S1P2 | 7:0 | P2[7:0] | |||||||
15:8 | P2[15:8] | |||||||||
0x049B ... 0x049D | Reserved | |||||||||
0x049E | PWMLOAD | 7:0 | MPWM4LD | MPWM3LD | MPWM2LD | MPWM1LD | ||||
0x049F | PWMEN | 7:0 | MPWM4EN | MPWM3EN | MPWM2EN | MPWM1EN | ||||
0x04A0 ... 0x050B | Reserved | |||||||||
0x050C | PWM2ERS | 7:0 | ERS[3:0] | |||||||
0x050D | PWM2CLK | 7:0 | CLK[3:0] | |||||||
0x050E | PWM2LDS | 7:0 | LDS[2:0] | |||||||
0x050F | PWM2PR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x0511 | PWM2CPRE | 7:0 | CPRE[7:0] | |||||||
0x0512 | PWM2PIPOS | 7:0 | PIPOS[7:0] | |||||||
0x0513 | PWM2GIR | 7:0 | S1P2 | S1P1 | ||||||
0x0514 | PWM2GIE | 7:0 | S1P2 | S1P1 | ||||||
0x0515 | PWM2CON | 7:0 | EN | LD | ERSPOL | ERSNOW | ||||
0x0516 | PWM2S1CFG | 7:0 | POL2 | POL1 | PPEN | MODE[2:0] | ||||
0x0517 | PWM2S1P1 | 7:0 | P1[7:0] | |||||||
15:8 | P1[15:8] | |||||||||
0x0519 | PWM2S1P2 | 7:0 | P2[7:0] | |||||||
15:8 | P2[15:8] | |||||||||
0x051B ... 0x058B | Reserved | |||||||||
0x058C | NCO1ACC | 7:0 | ACC[7:0] | |||||||
15:8 | ACC[15:8] | |||||||||
23:16 | ACC[19:16] | |||||||||
0x058F | NCO1INC | 7:0 | INC[7:0] | |||||||
15:8 | INC[15:8] | |||||||||
23:16 | INC[19:16] | |||||||||
0x0592 | NCO1CON | 7:0 | EN | OUT | POL | PFM | ||||
0x0593 | NCO1CLK | 7:0 | PWS[2:0] | CKS[3:0] | ||||||
0x0594 ... 0x060B | Reserved | |||||||||
0x060C | CWG1CLK | 7:0 | CS | |||||||
0x060D | CWG1ISM | 7:0 | ISM[4:0] | |||||||
0x060E | CWG1DBR | 7:0 | DBR[5:0] | |||||||
0x060F | CWG1DBF | 7:0 | DBF[5:0] | |||||||
0x0610 | CWG1CON0 | 7:0 | EN | LD | MODE[2:0] | |||||
0x0611 | CWG1CON1 | 7:0 | IN | POLD | POLC | POLB | POLA | |||
0x0612 | CWG1AS0 | 7:0 | SHUTDOWN | REN | LSBD[1:0] | LSAC[1:0] | ||||
0x0613 | CWG1AS1 | 7:0 | AS7E | AS6E | AS5E | AS4E | AS3E | AS2E | AS1E | AS0E |
0x0614 | CWG1STR | 7:0 | OVRD | OVRC | OVRB | OVRA | STRD | STRC | STRB | STRA |
0x0615 ... 0x068B | Reserved | |||||||||
0x068C | CLCnCON | 7:0 | EN | OUT | INTP | INTN | MODE[2:0] | |||
0x068D | CLCnPOL | 7:0 | POL | G4POL | G3POL | G2POL | G1POL | |||
0x068E | CLCnSEL0 | 7:0 | D1S[6:0] | |||||||
0x068F | CLCnSEL1 | 7:0 | D2S[6:0] | |||||||
0x0690 | CLCnSEL2 | 7:0 | D3S[6:0] | |||||||
0x0691 | CLCnSEL3 | 7:0 | D4S[6:0] | |||||||
0x0692 | CLCnGLS0 | 7:0 | G1D4T | G1D4N | G1D3T | G1D3N | G1D2T | G1D2N | G1D1T | G1D1N |
0x0693 | CLCnGLS1 | 7:0 | G2D4T | G2D4N | G2D3T | G2D3N | G2D2T | G2D2N | G2D1T | G2D1N |
0x0694 | CLCnGLS2 | 7:0 | G3D4T | G3D4N | G3D3T | G3D3N | G3D2T | G3D2N | G3D1T | G3D1N |
0x0695 | CLCnGLS3 | 7:0 | G4D4T | G4D4N | G4D3T | G4D3N | G4D2T | G4D2N | G4D1T | G4D1N |
0x0696 | CLCSELECT | 7:0 | SLCT[3:0] | |||||||
0x0697 | CLCDATA | 7:0 | CLC4OUT | CLC3OUT | CLC2OUT | CLC1OUT | ||||
0x0698 ... 0x070B | Reserved | |||||||||
0x070C | RC1REG | 7:0 | RCREG[7:0] | |||||||
0x070D | TX1REG | 7:0 | TXREG[7:0] | |||||||
0x070E | SP1BRG | 7:0 | SPBRG[7:0] | |||||||
15:8 | SPBRG[15:8] | |||||||||
0x0710 | RC1STA | 7:0 | SPEN | RX9 | SREN | CREN | ADDEN | FERR | OERR | RX9D |
0x0711 | TX1STA | 7:0 | CSRC | TX9 | TXEN | SYNC | SENDB | BRGH | TRMT | TX9D |
0x0712 | BAUD1CON | 7:0 | ABDOVF | RCIDL | SCKP | BRG16 | WUE | ABDEN | ||
0x0713 ... 0x0715 | Reserved | |||||||||
0x0716 | RC2REG | 7:0 | RCREG[7:0] | |||||||
0x0717 | TX2REG | 7:0 | TXREG[7:0] | |||||||
0x0718 | SP2BRG | 7:0 | SPBRG[7:0] | |||||||
15:8 | SPBRG[15:8] | |||||||||
0x071A | RC2STA | 7:0 | SPEN | RX9 | SREN | CREN | ADDEN | FERR | OERR | RX9D |
0x071B | TX2STA | 7:0 | CSRC | TX9 | TXEN | SYNC | SENDB | BRGH | TRMT | TX9D |
0x071C | BAUD2CON | 7:0 | ABDOVF | RCIDL | SCKP | BRG16 | WUE | ABDEN | ||
0x071D ... 0x078B | Reserved | |||||||||
0x078C | SSP1BUF | 7:0 | BUF[7:0] | |||||||
0x078D | SSP1ADD | 7:0 | ADD[7:0] | |||||||
0x078E | SSP1MSK | 7:0 | MSK[6:0] | MSK0 | ||||||
0x078F | SSP1STAT | 7:0 | SMP | CKE | D/A | P | S | R/W | UA | BF |
0x0790 | SSP1CON1 | 7:0 | WCOL | SSPOV | SSPEN | CKP | SSPM[3:0] | |||
0x0791 | SSP1CON2 | 7:0 | GCEN | ACKSTAT | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN |
0x0792 | SSP1CON3 | 7:0 | ACKTIM | PCIE | SCIE | BOEN | SDAHT | SBCDE | AHEN | DHEN |
0x0793 ... 0x0795 | Reserved | |||||||||
0x0796 | SSP2BUF | 7:0 | BUF[7:0] | |||||||
0x0797 | SSP2ADD | 7:0 | ADD[7:0] | |||||||
0x0798 | SSP2MSK | 7:0 | MSK[6:0] | MSK0 | ||||||
0x0799 | SSP2STAT | 7:0 | SMP | CKE | D/A | P | S | R/W | UA | BF |
0x079A | SSP2CON1 | 7:0 | WCOL | SSPOV | SSPEN | CKP | SSPM[3:0] | |||
0x079B | SSP2CON2 | 7:0 | GCEN | ACKSTAT | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN |
0x079C | SSP2CON3 | 7:0 | ACKTIM | PCIE | SCIE | BOEN | SDAHT | SBCDE | AHEN | DHEN |
0x079D ... 0x080B | Reserved | |||||||||
0x080C | CM1CON0 | 7:0 | EN | OUT | POL | HYS | SYNC | |||
0x080D | CM1CON1 | 7:0 | INTP | INTN | ||||||
0x080E | CM1NCH | 7:0 | NCH[2:0] | |||||||
0x080F | CM1PCH | 7:0 | PCH[2:0] | |||||||
0x0810 | CM2CON0 | 7:0 | EN | OUT | POL | HYS | SYNC | |||
0x0811 | CM2CON1 | 7:0 | INTP | INTN | ||||||
0x0812 | CM2NCH | 7:0 | NCH[2:0] | |||||||
0x0813 | CM2PCH | 7:0 | PCH[2:0] | |||||||
0x0814 ... 0x081E | Reserved | |||||||||
0x081F | CMOUT | 7:0 | C2OUT | C1OUT | ||||||
0x0820 ... 0x088B | Reserved | |||||||||
0x088C | DAC1CON | 7:0 | EN | REFRNG | OE[1:0] | PSS[1:0] | NSS | |||
0x088D | DAC1DATL | 7:0 | DAC1R[7:0] | |||||||
0x088E ... 0x088F | Reserved | |||||||||
0x0890 | DAC2CON | 7:0 | EN | PSS[1:0] | NSS | |||||
0x0891 | DAC2DATL | 7:0 | DAC2R[7:0] | |||||||
0x0892 ... 0x090B | Reserved | |||||||||
0x090C | OPA1CON0 | 7:0 | EN | CPON | UG | SOC[1:0] | ||||
0x090D | OPA1CON1 | 7:0 | GSEL[2:0] | RESON | NSS[2:0] | |||||
0x090E | OPA1CON2 | 7:0 | NCH[2:0] | PCH[2:0] | ||||||
0x090F | OPA1CON3 | 7:0 | FMS[1:0] | PSS[1:0] | ||||||
0x0910 | OPA1HWC | 7:0 | OREN | HWCH[2:0] | ORPOL | HWCL[2:0] | ||||
0x0911 | OPA1OFFSET | 7:0 | OFFSET[7:0] | |||||||
0x0912 | OPA1ORS | 7:0 | ORS[4:0] | |||||||
0x0913 ... 0x098B | Reserved | |||||||||
0x098C | PWM3ERS | 7:0 | ERS[3:0] | |||||||
0x098D | PWM3CLK | 7:0 | CLK[3:0] | |||||||
0x098E | PWM3LDS | 7:0 | LDS[2:0] | |||||||
0x098F | PWM3PR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x0991 | PWM3CPRE | 7:0 | CPRE[7:0] | |||||||
0x0992 | PWM3PIPOS | 7:0 | PIPOS[7:0] | |||||||
0x0993 | PWM3GIR | 7:0 | S1P2 | S1P1 | ||||||
0x0994 | PWM3GIE | 7:0 | S1P2 | S1P1 | ||||||
0x0995 | PWM3CON | 7:0 | EN | LD | ERSPOL | ERSNOW | ||||
0x0996 | PWM3S1CFG | 7:0 | POL2 | POL1 | PPEN | MODE[2:0] | ||||
0x0997 | PWM3S1P1 | 7:0 | P1[7:0] | |||||||
15:8 | P1[15:8] | |||||||||
0x0999 | PWM3S1P2 | 7:0 | P2[7:0] | |||||||
15:8 | P2[15:8] | |||||||||
0x099B ... 0x0A0B | Reserved | |||||||||
0x0A0C | PWM4ERS | 7:0 | ERS[3:0] | |||||||
0x0A0D | PWM4CLK | 7:0 | CLK[3:0] | |||||||
0x0A0E | PWM4LDS | 7:0 | LDS[2:0] | |||||||
0x0A0F | PWM4PR | 7:0 | PR[7:0] | |||||||
15:8 | PR[15:8] | |||||||||
0x0A11 | PWM4CPRE | 7:0 | CPRE[7:0] | |||||||
0x0A12 | PWM4PIPOS | 7:0 | PIPOS[7:0] | |||||||
0x0A13 | PWM4GIR | 7:0 | S1P2 | S1P1 | ||||||
0x0A14 | PWM4GIE | 7:0 | S1P2 | S1P1 | ||||||
0x0A15 | PWM4CON | 7:0 | EN | LD | ERSPOL | ERSNOW | ||||
0x0A16 | PWM4S1CFG | 7:0 | POL2 | POL1 | PPEN | MODE[2:0] | ||||
0x0A17 | PWM4S1P1 | 7:0 | P1[7:0] | |||||||
15:8 | P1[15:8] | |||||||||
0x0A19 | PWM4S1P2 | 7:0 | P2[7:0] | |||||||
15:8 | P2[15:8] | |||||||||
0x0A1B ... 0x1C8B | Reserved | |||||||||
0x1C8C | NVMADR | 7:0 | NVMADR[7:0] | |||||||
15:8 | NVMADR[14:8] | |||||||||
0x1C8E | NVMDAT | 7:0 | NVMDAT[7:0] | |||||||
15:8 | NVMDAT[13:8] | |||||||||
0x1C90 | NVMCON1 | 7:0 | NVMREGS | LWLO | FREE | WRERR | WREN | WR | RD | |
0x1C91 | NVMCON2 | 7:0 | NVMCON2[7:0] | |||||||
0x1C92 | SCANHADR | 7:0 | SCANHADRL[7:0] | |||||||
15:8 | SCANHADRH[7:0] | |||||||||
0x1C94 | Reserved | |||||||||
0x1C95 | SCANLADR | 7:0 | SCANLADRL[7:0] | |||||||
15:8 | SCANLADRH[7:0] | |||||||||
0x1C97 | Reserved | |||||||||
0x1C98 | SCANCON0 | 7:0 | EN | SGO | BUSY | DABORT | INTM | MD[1:0] | ||
0x1C99 | SCANTRIG | 7:0 | TSEL[3:0] | |||||||
0x1C9A | CRCDATA | 7:0 | CRCDATAL[7:0] | |||||||
15:8 | CRCDATAH[7:0] | |||||||||
23:16 | CRCDATAU[7:0] | |||||||||
31:24 | CRCDATAT[7:0] | |||||||||
0x1C9E | CRCOUT | 7:0 | CRCOUTL[7:0] | |||||||
15:8 | CRCOUTH[7:0] | |||||||||
23:16 | CRCOUTU[7:0] | |||||||||
31:24 | CRCOUTT[7:0] | |||||||||
0x1C9E | CRCSHIFT | 7:0 | CRCSHIFTL[7:0] | |||||||
15:8 | CRCSHIFTH[7:0] | |||||||||
23:16 | CRCSHIFTU[7:0] | |||||||||
31:24 | CRCSHIFTT[7:0] | |||||||||
0x1C9E | CRCXOR | 7:0 | CRCXORL[7:0] | |||||||
15:8 | CRCXORH[7:0] | |||||||||
23:16 | CRCXORU[7:0] | |||||||||
31:24 | CRCXORT[7:0] | |||||||||
0x1CA2 | CRCCON0 | 7:0 | EN | GO | BUSY | ACCM | SETUP[1:0] | SHIFTM | FULL | |
0x1CA3 | CRCCON1 | 7:0 | PLEN[4:0] | |||||||
0x1CA4 | CRCCON2 | 7:0 | DLEN[4:0] | |||||||
0x1CA5 ... 0x1D0B | Reserved | |||||||||
0x1D0C | ADLTH | 7:0 | LTH[7:0] | |||||||
15:8 | LTH[15:8] | |||||||||
0x1D0E | ADUTH | 7:0 | UTH[7:0] | |||||||
15:8 | UTH[15:8] | |||||||||
0x1D10 | ADERR | 7:0 | ERR[7:0] | |||||||
15:8 | ERR[15:8] | |||||||||
0x1D12 | ADSTPT | 7:0 | STPT[7:0] | |||||||
15:8 | STPT[15:8] | |||||||||
0x1D14 | ADFLTR | 7:0 | FLTR[7:0] | |||||||
15:8 | FLTR[15:8] | |||||||||
0x1D16 | ADACC | 7:0 | ACC[7:0] | |||||||
15:8 | ACC[15:8] | |||||||||
23:16 | ACC[17:16] | |||||||||
0x1D19 | ADCNT | 7:0 | CNT[7:0] | |||||||
0x1D1A | ADRPT | 7:0 | RPT[7:0] | |||||||
0x1D1B | ADPREV | 7:0 | PREV[7:0] | |||||||
15:8 | PREV[15:8] | |||||||||
0x1D1D | ADRES | 7:0 | RES[7:0] | |||||||
15:8 | RES[15:8] | |||||||||
0x1D1F | ADPCH | 7:0 | PCH[5:0] | |||||||
0x1D20 | ADNCH | 7:0 | NCH[5:0] | |||||||
0x1D21 | ADACQ | 7:0 | ACQ[7:0] | |||||||
15:8 | ACQ[12:8] | |||||||||
0x1D23 | ADCAP | 7:0 | CAP[4:0] | |||||||
0x1D24 | ADPRE | 7:0 | PRE[7:0] | |||||||
15:8 | PRE[12:8] | |||||||||
0x1D26 | ADCON0 | 7:0 | ON | CONT | CS | FM[1:0] | IC | GO | ||
0x1D27 | ADCON1 | 7:0 | PPOL | IPEN | GPOL | PCSC | DSEN | |||
0x1D28 | ADCON2 | 7:0 | PSIS | CRS[2:0] | ACLR | MD[2:0] | ||||
0x1D29 | ADCON3 | 7:0 | CALC[2:0] | SOI | TMD[2:0] | |||||
0x1D2A | ADSTAT | 7:0 | AOV | UTHR | LTHR | MATH | STAT[2:0] | |||
0x1D2B | ADREF | 7:0 | NREF | PREF[1:0] | ||||||
0x1D2C | ADACT | 7:0 | ACT[4:0] | |||||||
0x1D2D | ADCLK | 7:0 | CS[5:0] | |||||||
0x1D2E | ADCG1A | 7:0 | CGA7 | CGA6 | CGA5 | CGA4 | CGA3 | CGA2 | CGA1 | CGA0 |
0x1D2F | ADCG1B | 7:0 | CGB7 | CGB6 | CGB5 | CGB4 | CGB3 | CGB2 | CGB1 | CGB0 |
0x1D30 | ADCG1C | 7:0 | CGC7 | CGC6 | CGC5 | CGC4 | CGC3 | CGC2 | CGC1 | CGC0 |
0x1D31 | ADCG1D | 7:0 | CGD7 | CGD6 | CGD5 | CGD4 | CGD3 | CGD2 | CGD1 | CGD0 |
0x1D32 | ADCG1E | 7:0 | CGE2 | CGE1 | CGE0 | |||||
0x1D33 ... 0x1D8B | Reserved | |||||||||
0x1D8C | RA0PPS | 7:0 | RA0PPS[5:0] | |||||||
0x1D8D | RA1PPS | 7:0 | RA1PPS[5:0] | |||||||
0x1D8E | RA2PPS | 7:0 | RA2PPS[5:0] | |||||||
0x1D8F | RA3PPS | 7:0 | RA3PPS[5:0] | |||||||
0x1D90 | RA4PPS | 7:0 | RA4PPS[5:0] | |||||||
0x1D91 | RA5PPS | 7:0 | RA5PPS[5:0] | |||||||
0x1D92 | RA6PPS | 7:0 | RA6PPS[5:0] | |||||||
0x1D93 | RA7PPS | 7:0 | RA7PPS[5:0] | |||||||
0x1D94 | RB0PPS | 7:0 | RB0PPS[5:0] | |||||||
0x1D95 | RB1PPS | 7:0 | RB1PPS[5:0] | |||||||
0x1D96 | RB2PPS | 7:0 | RB2PPS[5:0] | |||||||
0x1D97 | RB3PPS | 7:0 | RB3PPS[5:0] | |||||||
0x1D98 | RB4PPS | 7:0 | RB4PPS[5:0] | |||||||
0x1D99 | RB5PPS | 7:0 | RB5PPS[5:0] | |||||||
0x1D9A | RB6PPS | 7:0 | RB6PPS[5:0] | |||||||
0x1D9B | RB7PPS | 7:0 | RB7PPS[5:0] | |||||||
0x1D9C | RC0PPS | 7:0 | RC0PPS[5:0] | |||||||
0x1D9D | RC1PPS | 7:0 | RC1PPS[5:0] | |||||||
0x1D9E | RC2PPS | 7:0 | RC2PPS[5:0] | |||||||
0x1D9F | RC3PPS | 7:0 | RC3PPS[5:0] | |||||||
0x1DA0 | RC4PPS | 7:0 | RC4PPS[5:0] | |||||||
0x1DA1 | RC5PPS | 7:0 | RC5PPS[5:0] | |||||||
0x1DA2 | RC6PPS | 7:0 | RC6PPS[5:0] | |||||||
0x1DA3 | RC7PPS | 7:0 | RC7PPS[5:0] | |||||||
0x1DA4 | RD0PPS | 7:0 | RD0PPS[5:0] | |||||||
0x1DA5 | RD1PPS | 7:0 | RD1PPS[5:0] | |||||||
0x1DA6 | RD2PPS | 7:0 | RD2PPS[5:0] | |||||||
0x1DA7 | RD3PPS | 7:0 | RD3PPS[5:0] | |||||||
0x1DA8 | RD4PPS | 7:0 | RD4PPS[5:0] | |||||||
0x1DA9 | RD5PPS | 7:0 | RD5PPS[5:0] | |||||||
0x1DAA | RD6PPS | 7:0 | RD6PPS[5:0] | |||||||
0x1DAB | RD7PPS | 7:0 | RD7PPS[5:0] | |||||||
0x1DAC | RE0PPS | 7:0 | RE0PPS[5:0] | |||||||
0x1DAD | RE1PPS | 7:0 | RE1PPS[5:0] | |||||||
0x1DAE | RE2PPS | 7:0 | RE2PPS[5:0] | |||||||
0x1DAF ... 0x1E0B | Reserved | |||||||||
0x1E0C | PPSLOCK | 7:0 | PPSLOCKED | |||||||
0x1E0D | INTPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E0E | T0CKIPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E0F | T1CKIPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E10 | T1GPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E11 | T3CKIPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E12 | T3GPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E13 ... 0x1E18 | Reserved | |||||||||
0x1E19 | T2INPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E1A | T4INPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E1B | T6INPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E1C ... 0x1E1D | Reserved | |||||||||
0x1E1E | CCP1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E1F | CCP2PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E20 ... 0x1E23 | Reserved | |||||||||
0x1E24 | PWMIN0PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E25 | PWMIN1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E26 | PWM1ERSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E27 | PWM2ERSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E28 | PWM3ERSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E29 | PWM4ERSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E2A ... 0x1E38 | Reserved | |||||||||
0x1E39 | CWG1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E3A ... 0x1E3C | Reserved | |||||||||
0x1E3D | CLCIN0PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E3E | CLCIN1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E3F | CLCIN2PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E40 | CLCIN3PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E41 | RX1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E42 | CK1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E43 | RX2PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E44 | CK2PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E45 ... 0x1E46 | Reserved | |||||||||
0x1E47 | SSP1CLKPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E48 | SSP1DATPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E49 | SSP1SSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E4A | SSP2CLKPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E4B | SSP2DATPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E4C | SSP2SSPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E4D ... 0x1E4F | Reserved | |||||||||
0x1E50 | ADACTPPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E51 ... 0x1E52 | Reserved | |||||||||
0x1E53 | OPA1PPS | 7:0 | PORT[2:0] | PIN[2:0] | ||||||
0x1E54 ... 0x1E8B | Reserved | |||||||||
0x1E8C | ANSELA | 7:0 | ANSELA7 | ANSELA6 | ANSELA5 | ANSELA4 | ANSELA3 | ANSELA2 | ANSELA1 | ANSELA0 |
0x1E8D | WPUA | 7:0 | WPUA7 | WPUA6 | WPUA5 | WPUA4 | WPUA3 | WPUA2 | WPUA1 | WPUA0 |
0x1E8E | ODCONA | 7:0 | ODCA7 | ODCA6 | ODCA5 | ODCA4 | ODCA3 | ODCA2 | ODCA1 | ODCA0 |
0x1E8F | SLRCONA | 7:0 | SLRA7 | SLRA6 | SLRA5 | SLRA4 | SLRA3 | SLRA2 | SLRA1 | SLRA0 |
0x1E90 | INLVLA | 7:0 | INLVLA7 | INLVLA6 | INLVLA5 | INLVLA4 | INLVLA3 | INLVLA2 | INLVLA1 | INLVLA0 |
0x1E91 | IOCAP | 7:0 | IOCAP7 | IOCAP6 | IOCAP5 | IOCAP4 | IOCAP3 | IOCAP2 | IOCAP1 | IOCAP0 |
0x1E92 | IOCAN | 7:0 | IOCAN7 | IOCAN6 | IOCAN5 | IOCAN4 | IOCAN3 | IOCAN2 | IOCAN1 | IOCAN0 |
0x1E93 | IOCAF | 7:0 | IOCAF7 | IOCAF6 | IOCAF5 | IOCAF4 | IOCAF3 | IOCAF2 | IOCAF1 | IOCAF0 |
0x1E94 ... 0x1E95 | Reserved | |||||||||
0x1E96 | ANSELB | 7:0 | ANSELB7 | ANSELB6 | ANSELB5 | ANSELB4 | ANSELB3 | ANSELB2 | ANSELB1 | ANSELB0 |
0x1E97 | WPUB | 7:0 | WPUB7 | WPUB6 | WPUB5 | WPUB4 | WPUB3 | WPUB2 | WPUB1 | WPUB0 |
0x1E98 | ODCONB | 7:0 | ODCB7 | ODCB6 | ODCB5 | ODCB4 | ODCB3 | ODCB2 | ODCB1 | ODCB0 |
0x1E99 | SLRCONB | 7:0 | SLRB7 | SLRB6 | SLRB5 | SLRB4 | SLRB3 | SLRB2 | SLRB1 | SLRB0 |
0x1E9A | INLVLB | 7:0 | INLVLB7 | INLVLB6 | INLVLB5 | INLVLB4 | INLVLB3 | INLVLB2 | INLVLB1 | INLVLB0 |
0x1E9B | IOCBP | 7:0 | IOCBP7 | IOCBP6 | IOCBP5 | IOCBP4 | IOCBP3 | IOCBP2 | IOCBP1 | IOCBP0 |
0x1E9C | IOCBN | 7:0 | IOCBN7 | IOCBN6 | IOCBN5 | IOCBN4 | IOCBN3 | IOCBN2 | IOCBN1 | IOCBN0 |
0x1E9D | IOCBF | 7:0 | IOCBF7 | IOCBF6 | IOCBF5 | IOCBF4 | IOCBF3 | IOCBF2 | IOCBF1 | IOCBF0 |
0x1E9E ... 0x1E9F | Reserved | |||||||||
0x1EA0 | ANSELC | 7:0 | ANSELC7 | ANSELC6 | ANSELC5 | ANSELC4 | ANSELC3 | ANSELC2 | ANSELC1 | ANSELC0 |
0x1EA1 | WPUC | 7:0 | WPUC7 | WPUC6 | WPUC5 | WPUC4 | WPUC3 | WPUC2 | WPUC1 | WPUC0 |
0x1EA2 | ODCONC | 7:0 | ODCC7 | ODCC6 | ODCC5 | ODCC4 | ODCC3 | ODCC2 | ODCC1 | ODCC0 |
0x1EA3 | SLRCONC | 7:0 | SLRC7 | SLRC6 | SLRC5 | SLRC4 | SLRC3 | SLRC2 | SLRC1 | SLRC0 |
0x1EA4 | INLVLC | 7:0 | INLVLC7 | INLVLC6 | INLVLC5 | INLVLC4 | INLVLC3 | INLVLC2 | INLVLC1 | INLVLC0 |
0x1EA5 | IOCCP | 7:0 | IOCCP7 | IOCCP6 | IOCCP5 | IOCCP4 | IOCCP3 | IOCCP2 | IOCCP1 | IOCCP0 |
0x1EA6 | IOCCN | 7:0 | IOCCN7 | IOCCN6 | IOCCN5 | IOCCN4 | IOCCN3 | IOCCN2 | IOCCN1 | IOCCN0 |
0x1EA7 | IOCCF | 7:0 | IOCCF7 | IOCCF6 | IOCCF5 | IOCCF4 | IOCCF3 | IOCCF2 | IOCCF1 | IOCCF0 |
0x1EA8 ... 0x1EA9 | Reserved | |||||||||
0x1EAA | ANSELD | 7:0 | ANSELD7 | ANSELD6 | ANSELD5 | ANSELD4 | ANSELD3 | ANSELD2 | ANSELD1 | ANSELD0 |
0x1EAB | WPUD | 7:0 | WPUD7 | WPUD6 | WPUD5 | WPUD4 | WPUD3 | WPUD2 | WPUD1 | WPUD0 |
0x1EAC | ODCOND | 7:0 | ODCD7 | ODCD6 | ODCD5 | ODCD4 | ODCD3 | ODCD2 | ODCD1 | ODCD0 |
0x1EAD | SLRCOND | 7:0 | SLRD7 | SLRD6 | SLRD5 | SLRD4 | SLRD3 | SLRD2 | SLRD1 | SLRD0 |
0x1EAE | INLVLD | 7:0 | INLVLD7 | INLVLD6 | INLVLD5 | INLVLD4 | INLVLD3 | INLVLD2 | INLVLD1 | INLVLD0 |
0x1EAF ... 0x1EB3 | Reserved | |||||||||
0x1EB4 | ANSELE | 7:0 | ANSELE2 | ANSELE1 | ANSELE0 | |||||
0x1EB5 | WPUE | 7:0 | WPUE3 | WPUE2 | WPUE1 | WPUE0 | ||||
0x1EB6 | ODCONE | 7:0 | ODCE2 | ODCE1 | ODCE0 | |||||
0x1EB7 | SLRCONE | 7:0 | SLRE2 | SLRE1 | SLRE0 | |||||
0x1EB8 | INLVLE | 7:0 | INLVLE3 | INLVLE2 | INLVLE1 | INLVLE0 | ||||
0x1EB9 | IOCEP | 7:0 | IOCEP3 | |||||||
0x1EBA | IOCEN | 7:0 | IOCEN3 | |||||||
0x1EBB | IOCEF | 7:0 | IOCEF3 | |||||||
0x1EBC ... 0x1EE2 | Reserved | |||||||||
0x1EE3 | RB1I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EE4 | RB2I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EE5 ... 0x1EEA | Reserved | |||||||||
0x1EEB | RC3I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EEC | RC4I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EED | Reserved | |||||||||
0x1EEE | RD0I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EEF | RD1I2C | 7:0 | SLEW | PU[1:0] | TH[1:0] | |||||
0x1EF0 ... 0x8004 | Reserved | |||||||||
0x8005 | REVISIONID | 7:0 | MJRREV[1:0] | MNRREV[5:0] | ||||||
15:8 | Reserved | Reserved | MJRREV[5:2] | |||||||
0x8006 | DEVICEID | 7:0 | DEV[7:0] | |||||||
15:8 | Reserved | Reserved | DEV[11:8] | |||||||
0x8007 | CONFIG1 | 7:0 | RSTOSC[2:0] | FEXTOSC[2:0] | ||||||
15:8 | FCMEN | VDDAR | CSWEN | CLKOUTEN | ||||||
0x8008 | CONFIG2 | 7:0 | BOREN[1:0] | LPBOREN | PWRTS[1:0] | MCLRE | ||||
15:8 | DEBUG | STVREN | PPS1WAY | ZCD | BORV | DACAUTOEN | ||||
0x8009 | CONFIG3 | 7:0 | WDTE[1:0] | WDTCPS[4:0] | ||||||
15:8 | WDTCCS[2:0] | WDTCWS[2:0] | ||||||||
0x800A | CONFIG4 | 7:0 | WRTAPP | SAFEN | BBEN | BBSIZE[2:0] | ||||
15:8 | LVP | WRTSAF | WRTD | WRTC | WRTB | |||||
0x800B | CONFIG5 | 7:0 | CPD | CP | ||||||
15:8 |