4.1 Revision History

• Initial document release

• ATtiny804/1604 Silicon Errata and Data Sheet Clarification
• ATtiny806/1606 Silicon Errata and Data Sheet Clarification
• ATtiny807/1607 Silicon Errata and Data Sheet Clarification

• ATtiny804/806/807/1604/1606/1607 Silicon Errata and Data Sheet Clarification (this document)

The following items are referring to changes between the latest revisions of the obsolete documents and this document:

• Added new errata:
  • Device: Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values
  • CCL: The CCL Must be Disabled to Change the Configuration of a Single LUT
  • TCA: Restart Will Reset Counter Direction in NORMAL and FRQ Mode
  • TCB: CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode
  • USART:
    • Open-Drain Mode Does Not Work When TXD is Configured as Output
    • Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode

• Removed old data sheet clarifications, as the corresponding data sheet has been updated with correct information