1 Silicon Issue Summary
| Module | Item/Feature | Summary | Affected Silicon Revisions |
|---|---|---|---|
| A | |||
| FLEXCOM | FLEXCOM SMBUS alert | FLEXCOM SMBUS alert signaling is not functional | X |
| I2SC | I2SC sent data | I2SC first sent data corrupted | X |
| MCAN | Debug message handling state machine not reset | Debug message handling state machine not reset to Idle state | X |
| PMC | PMC_MCKR.PRES field | Change of the field PMC_MCKR.PRES is not allowed if Master/Processor Clock Prescaler frequency is too high | X |
| PTC | Wrong pull-up value on PD[18:3] during reset | Incorrect pull-up value | X |
| PWM | Fault Protection to Hi-Z for PWMx output | Fault Protection to Hi-Z for PWMx output is not functional | X |
| RSTC | RSTC_SR.RSTTYP field | RSTC_SR.RSTTYP does not show GENERAL_RST | X |
| RTC | RTC_SR.TDERR flag | RTC_SR.TDERR flag is stuck at 0 | X |
| RTC | Truncated read access to RTC_TIMALR (UTC_MODE) | Read access truncated to the first 24 bits for register RTC_TIMALR (UTC_MODE) | X |
| QSPI | DLYCS delay | QSPI hangs with long DLYCS | X |
| ROM Code | JTAG_TCK | JTAG_TCK on IOSET 4 pin has a wrong configuration after boot | X |
| ROM Code | UART connection to SAM-BA Monitor |
UART blocks USB connection to SAM-BA Monitor | X |
| ROM Code | Secure Boot Mode: AES-RSA X.509 Certificate Serial Number Length Limit | The length of serial numbers is limited to 16 bytes by the ROM code | X |
| SDMMC | Software 'Reset For all' command | Software 'Reset For all' command is not guaranteed | X |
| SDMMC | Sampling clock tuning procedure | Sampling clock tuning procedure may freeze | X |
| SDMMC | SDMMC I/O calibration does not work | The impedance calibration mechanism for the SDMMC I/Os does not work | X |
| SSC | TD output | Unexpected delay on TD output | X |
| TWIHS | Clear command | The TWI/TWIHS Clear command does not work | X |
| WDT | Restart command | Restart command of WDT may reset the DDR controller | X |