19.6.4.2 Regulator Automatic Low-Power Mode

In Standby mode, the PM selects either the main or the low-power voltage regulator to supply the VDDCORE. By default, the low-power voltage regulator is used.

If a sleepwalking task is working on either asynchronous clocks (generic clocks) or synchronous clock (APB/AHB clocks), the main voltage regulator is used. This behavior can be changed by writing the Voltage Regulator Standby Mode bits in the Standby Configuration register (STDBYCFG.VREGSMOD). For additional information, refer to the following table.

Table 19-4. Regulator State in Sleep Mode
Sleep

Mode

STDBYCFG.

VREGSMOD

SleepWalking (1) Regulator State for VDDCORE
Active - - main voltage regulator
Idle - - main voltage regulator
Standby 0x0: AUTO NO low-power regulator
YES main voltage regulator
0x1: PERFORMANCE - main voltage regulator
0x2: LP (2) (2) low-power regulator
Note:
  1. SleepWalking is running on a GCLK clock or synchronous clock. This is not related to the XOSC32K or OSCULP32K clocks.
  2. Must only be used when SleepWalking is running on GCLK with 32 kHz source.