25.10.3 Block Transfer Source Address

The SRCADDR register offset is relative to (BASEADDR or WRBADDR) + Channel Number * 0x10
Name: SRCADDR
Offset: 0x04
Property: -

Bit 3130292827262524 
 SRCADDR[31:24] 
Access -------- 
Reset  
Bit 2322212019181716 
 SRCADDR[23:16] 
Access -------- 
Reset  
Bit 15141312111098 
 SRCADDR[15:8] 
Access -------- 
Reset  
Bit 76543210 
 SRCADDR[7:0] 
Access -------- 
Reset  

Bits 31:0 – SRCADDR[31:0] Transfer Source Address

This bit field holds the block transfer source address.

When source address incrementation is disabled (BTCTRL.SRCINC=0), SRCADDR corresponds to the last beat transfer address in the block transfer.

When source address incrementation is enabled (BTCTRL.SRCINC=1), SRCADDR is calculated as follows:

If BTCTRL.STEPSEL=1:

SRCADDR = SRCADDR S T A R T + B T C N T ( B E A T S I Z E + 1 ) 2 STEPSIZE

If BTCTRL.STEPSEL=0:

SRCADDR = SRCADDR S T A R T + B T C N T ( B E A T S I Z E + 1 )

  • SRCADDRSTART is the source address of the first beat transfer in the block transfer
  • BTCNT is the initial number of beats remaining in the block transfer
  • BEATSIZE is the configured number of bytes in a beat
  • STEPSIZE is the configured number of beats for each incrementation