26.8.12 Debouncer Prescaler

Important: This register is only available on SAM C20/C21 N variants.
Name: DPRESCALER
Offset: 0x34
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
        TICKON 
Access RW 
Reset 0 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 STATES1PRESCALER1[2:0]STATES0PRESCALER0[2:0] 
Access RWRWRWRWRWRWRWRW 
Reset 00000000 

Bit 16 – TICKON Pin Sampler frequency selection

This bit selects the clock used for the sampling of bounce during transition detection.
ValueDescription
0 The bounce sampler is using GCLK_EIC.
1 The bounce sampler is using the low frequency clock.

Bits 3, 7 – STATESx Debouncer number of states x

This bit selects the number of samples by the debouncer low frequency clock needed to validate a transition from current pin state to next pin state in synchronous debouncing mode for pins EXTINT[7+(8x):8x].
ValueDescription
0 The number of low frequency samples is 3.
1 The number of low frequency samples is 7.

Bits 0:2, 4:6 – PRESCALERx Debouncer Prescaler x

These bits select the debouncer low frequency clock for pins EXTINT[7+(8x):8x].
ValueNameDescription
0x0 F/2 EIC clock divided by 2
0x1 F/4 EIC clock divided by 4
0x2 F/8 EIC clock divided by 8
0x3 F/16 EIC clock divided by 16
0x4 F/32 EIC clock divided by 32
0x5 F/64 EIC clock divided by 64
0x6 F/128 EIC clock divided by 128
0x7 F/256 EIC clock divided by 256