1 Security Architecture

The following figure illustrates the device architecture from a security perspective. The rest of the chapter describes the components of the security architecture.

Figure 1-1. Simplified Security Model
Note: User Cryptoprocessor is part of MSS in PolarFire SoC FPGAs and there is no MSS in PolarFire FPGAs and RT PolarFire FPGAs. User Cryptoprocessor is a standalone block in both PolarFire FPGAs and RT PolarFire FPGAs.