2.3 ADC Clock Period

The time to complete a one-bit conversion is defined as the TAD and it is identical to 1/ADC Clock Frequency. TAD must be greater than 500 ns and less than 9 µs for the correct conversion.

Figure 2-1 illustrates the recommended combination of F_OSC and Clock divider values. The colored area shows a violation, and the white area recommended combinations.

Figure 2-1. Recommended Combination of F_OSC and Clock Divider Values

Examples included in the next section follow all the recommended settings.

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