2 Overview
The MVIO pins, located on PORTC, are powered by a separate VDDIO2 pin while the rest are powered by VDD. This allows for additional power domain at a different voltage level within the limits of the Electrical Characteristics of each device.
These pins are capable of the same digital behavior as regular I/O pins, for example GPIO, serial communication (USART, SPI, I2C), or connected to PWM peripherals. The input Schmitt Trigger levels are scaled according to the VDDIO2 voltage, as described in the Electrical Characteristics section of the data sheet.
A configuration fuse determines the MVIO supply mode. The loss or gain of power on VDDIO2 is signaled by a status register bit. This status bit has corresponding interrupt and event functionality.
A divided-down VDDIO2 voltage is available as input to the ADC.