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PIC18(L)F67K40 Family Silicon Errata and Data Sheet Clarifications
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PIC18F67K40
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1
Silicon Errata Issues
1.11
Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
Introduction
Silicon Issue Summary
1
Silicon Errata Issues
1.1
Module: ADCC - Analog-to-Digital Converter with Computation
1.2
Module: PIC18 Debug Executive
1.3
Module: PIC18 Core
1.4
Module: Program Flash Memory (PFM)
1.5
Module: MSSP
1.6
Module: Electrical Specifications
1.7
Module: Timer0
1.8
Module: Windowed Watchdog Timer (WWDT)
1.9
Module: Nonvolatile Memory (NVM)
1.10
Module: Signal Measurement Timer (SMT)
1.11
Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
1.11.1
Double Byte Transmit
1.12
Module: Capture/Compare/PWM Module (CCP)
1.13
Module: Low-Voltage In-Circuit Serial Programming™ (LVP)
2
Data Sheet Clarifications
3
Appendix A: Revision History
Microchip Information
1.11 Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
