24.13.8 Clock Selection
| Name: | CLKSEL |
| Offset: | 0x07 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKSEL[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
Bits 1:0 – CLKSEL[1:0] Clock Select
Writing these bits select the source for the RTC clock (CLK_RTC).
When configuring the RTC to use either XOSC32K or the external clock on XTAL32K1, XOSC32K
needs to be enabled, and the Source Select (SEL) bit and Run Standby (RUNSTDBY) bit in the
XOSC32K Control A of the Clock Controller (CLKCTRL.XOSC32KCTRLA) register must be configured
accordingly.
| Value | Name | Description |
|---|---|---|
0x00 |
OSC32K | 32.768 kHz from OSC32K |
0x01 |
OSC1K | 1.024 kHz from OSC32K |
0x02 |
XTAL32K | 32.768 kHz crystal oscillator |
0x03 |
EXTCLK | External clock from EXTCLK pin |