6 I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
No | PAD | EXTINT | PCINT | ADC/AC | OSC | T/C # 0 | T/C # 1 | USART | I2C | SPI |
---|---|---|---|---|---|---|---|---|---|---|
1 | PD[3] | INT1 | PCINT19 | OC2B | ||||||
2 | PD[4] | PCINT20 | T0 | XCK | ||||||
3 | PE[0] | ACO | ||||||||
4 | VCC | |||||||||
5 | GND | |||||||||
6 | PE[1] | |||||||||
7 | PB[6] | PCINT6 | XTAL1/TOSC1 | |||||||
8 | PB[7] | PCINT7 | XTAL2/TOSC2 | |||||||
9 | PD[5] | PCINT21 | OC0B | T1 | ||||||
10 | PD[6] | PCINT22 | AIN0 | OC0A | ||||||
11 | PD[7] | PCINT23 | AIN1 | |||||||
12 | PB[0] | PCINT0 | CLKO | ICP1 | ||||||
13 | PB[1] | PCINT1 | OC1A | |||||||
14 | PB[2] | PCINT2 | OC1B | SS | ||||||
15 | PB[3] | PCINT3 | OC2A | MOSI | ||||||
16 | PB[4] | PCINT4 | MISO | |||||||
17 | PB[5] | PCINT5 | SCK | |||||||
18 | AVCC | |||||||||
19 | PE[2] | ADC6 | ||||||||
20 | AREF | |||||||||
21 | GND | |||||||||
22 | PE[3] | ADC7 | ||||||||
23 | PC[0] | PCINT8 | ADC0 | |||||||
24 | PC[1] | PCINT9 | ADC1 | |||||||
25 | PC[2] | PCINT10 | ADC2 | |||||||
26 | PC[3] | PCINT11 | ADC3 | |||||||
27 | PC[4] | PCINT12 | ADC4 | SDA | ||||||
28 | PC[5] | PCINT13 | ADC5 | SCL | ||||||
29 | PC[6]/RESET | PCINT14 | ||||||||
30 | PD[0] | PCINT16 | RXD | |||||||
31 | PD[1] | PCINT17 | TXD | |||||||
32 | PD[2] | INT0 | PCINT18 |