4.7 Handling Time-Related Events

The driving of the motor is highly time-dependent. Two instances of the TCA peripheral and one instance of the TCB peripheral are used in this system to handle the time-related events.

The first instance of the TCA peripheral (TCA0) controls the speed of the motor when the system is in Ramp-Up/Open Loop mode. It triggers a periodical interrupt at an interval determined by the value from the CMP0 compare register.

By decreasing the value from the CMP0 register, the interrupt period decreases, and the motor is accelerated. If the decreasing of the register stops, the motor is commutated with a fixed period, and the Control mode is switched to Open Loop mode.

Upon reaching the interrupt, the algorithm moves to the next trapezoidal step and, after that, it triggers it.

This is done using the following lines of code: 

tmr_ramp_up_compare_value -= MOTOR_TIMER_RAMP_UP_DECREMENT;
TCA0_setCMP0Value(tmr_ramp_up_compare_value);
#define MOTOR_TIMER_RAMP_UP_DECREMENT       800

The second instance of the TCA peripheral (TCA1) is used for driving/handling time-related motor events during each step.

During one trapezoidal step, the counter serves four purposes:
  • It handles the blanking time
  • It counts the time from the commutation point to the zero-cross point
  • It counts the new calculated time from the zero-cross point to the new commutation point
  • It handles the stall detection (zero-cross time-out)

The counter has three compare channels, each of them configured to trigger a specific interrupt.

The method of operation is described below:

After a new commutation, the CNT register value is cleared, and the CMP0 interrupt is enabled.

Upon reaching the CMP0 interrupt, the AC1 interrupt is enabled, and the CMP0 interrupt is disabled.

If the zero cross is found within the CMP2 time interval, then the timer is stopped, the CNT register value is processed with the zero-cross filter and set to the CMP1 register. The counter register is cleared once again and the CMP1 interrupt is enabled.

When the timer reaches the CMP1 value, it triggers an interrupt, commutates to the next step, disables the CMP1 interrupt, and the cycle is repeated. A detailed, time-domain representation of the functionality of this block can be seen in Figure 4-6.

Figure 4-6. TCA1 Time-Domain Representation

The TCB0 timer/counter acts like a very basic scheduler to run tasks that are non-time critical. It uses a fixed value for a compare register which triggers an interrupt and sets the SCHEDULER_mainLoopFlag checked in the main loop.