1.3.1.1 How the Library Works

The Emulated EEPROM library is a single-client, single-instance interface.

Abstraction Model

The Emulated EEPROM library is built on top of NVM (Non-volatile memory) / EFC (Embedded Flash Controller) PLIB. The Emulated EEPROM Library uses the APIs provided by the underlying PLIB and provides a standard interface for the reading and writing of non-volatile configuration data, thereby abstracting out the device specific differences in the underlying NVM/EFC PLIBs.

Working Flow

Emulator Characteristics

This emulator is designed for best reliability, with a good balance of available storage and write cycle limits. It is designed to ensure that page data is automatically updated so that in the event of a failed update the previous data is not lost (when used correctly).

With the exception of a system reset with data cached to the internal write-cache buffer, at most only the latest write to physical non-volatile memory will be lost in the event of a failed write. This emulator scheme is tuned to give best write-cycle longevity when writes are confined to the same logical EEPROM page (where possible) and when writes across multiple logical EEPROM pages are made in a linear fashion through the entire emulated EEPROM space.

Spare Row

As data needs to be preserved between row erasures, a single FLASH row is kept unused to act as destination for copied data when a write request is made to an already full row. When the write request is made, any logical pages of data in the full row that need to be preserved are written to the spare row along with the new (updated) logical page data, before the old row is erased and marked as the new spare.

Row Contents

Each physical FLASH row initially stores the contents of N/2 logical EEPROM memory pages, where N is the total number of pages in one row. This halves the available storage space for the emulated EEPROM but reduces the overall number of row erases that are required.

As logical pages within a physical row are updated, the new data is filled into the remaining unused pages in the row. Once the entire row is full, a new write request will copy the logical page not being written to in the current row to the spare row with the new (updated) logical page data, before the old row is erased. This system allows for the same logical page to be updated up to N/2 + 1 ( where N is the total number of pages in one row) times into physical memory before a row erasure procedure is needed. In the case of multiple versions of the same logical EEPROM page being stored in the same physical row, the right-most (highest physical FLASH memory page address) version is considered to be the most current.

As a small amount of information needs to be stored in a header before the contents of a logical EEPROM page in memory (for use by the emulation service), the available data in each EEPROM page is less than the total size of a single NVM memory page by 4 bytes.