1.12 SPI Host Target Write Read

This example uses the QMPSI peripheral in SPI mode as SPI host and SPT peripheral as SPI target. The application enables Memory region 0 and Memory region 1 on SPI target and then enters the SPI host state machine. The SPI host sends commands to the SPI target to read and write from Memory region 0. The host also demonstrates enabling host interrupt in the SPI target peripheral by sending the relevant commands. Note that both the SPI host and target are implemented on the same development board. Also, note that the SPI host uses DMA mode for data transfer.

To clone or download this application from Github, go to the main page of this repository and then click Clone button to clone this repository or download as zip file. This content can also be downloaded using content manager by following these instructions.

Path of the application within the repository is apps/spt/spi_host_target_write_read/firmware .

To build the application, refer to the following table and open the project using its IDE.

The following table shows the target hardware for the application projects.

1. Build and Program the application using its IDE
2. LED indicates success or failure:
   • The LED is turned ON the data written and read from the SPI target matches on the SPI host side.