1.3.1 TBLRD Requires NVMREG Value to Point to Appropriate Memory
The affected silicon revisions of the PIC18(L)F24/25K40 devices improperly require the NVMREG[1:0] bits in the
NVMCON register to be set for TBLRD access of the various memory regions. The issue
is most apparent in compiled C programs when the user defines a const type and the
compiler uses TBLRD
instructions to retrieve the data from Program
Flash Memory (PFM). The issue is also apparent when the user defines an array in RAM
for which the compiler creates start-up code, executed before main(), that uses
TBLRD
instructions to initialize RAM from PFM.
Work around
Assembly code:
Set the NVMREG[1:0] bits to select the appropriate memory region before
executing TBLRD
instructions.
C code:
Create an assembly file named powerup.as and include this file with the other files in the project. This file will change the NVMREG[1:0] bits to point to program Flash before any code is executed. Contents of the powerup.as file:
#include <xc.inc>
GLOBAL powerup, start
PSECT powerup, class=CODE, delta=1, reloc=2
powerup:
BSF NVMCON1, 7
GOTO start
end
If there is a need to change the NVMREG[1:0] value to anything other
than ‘10
’ and the Interrupt Service Routine uses constants or
literal strings, then interrupts must be disabled before the change and restored to
‘10
’ before interrupts are enabled.
Affected Silicon Revisions
A3 | A4 | ||||||
X |