1.3.4 Clock Stretch Disable Not Working Properly
When the CSD bit is set between a Start condition and the eighth falling SCL edge, the I2C module enters a state where the module clock stretches indefinitely after the next Start until a bus timeout occurs.
Work around
Force a reset of the module by toggling the EN bit.
Affected Silicon Revisions
| D1 | D3 | E0 |
| X | X | X |