Register Description - 32-bit Mode
This Register Description section is valid if the TC is in 32-bit mode (CTRLA.MODE=2).
CTRLA
Control A
CTRLBCLR
Control B Clear
CTRLBSET
Control B Set
EVCTRL
Event Control
INTENCLR
Interrupt Enable Clear
INTENSET
Interrupt Enable Set
INTFLAG
Interrupt Flag Status and Clear
STATUS
Status
WAVE
Waveform Generation Control
DRVCTRL
Driver Control
DBGCTRL
Debug Control
SYNCBUSY
Synchronization Busy
COUNT
Counter Value, 32-bit Mode
PER
Period Value, 32-bit Mode
CCx
Channel x Compare/Capture Value, 32-bit Mode
PERBUF
Period Buffer Value, 32-bit Mode
CCBUFx
Channel x Compare Buffer Value, 32-bit Mode
Parent topic:
Register Description