The EIC must be initialized in the following order:
- 1.Enable CLK_EIC_APB
- 2.If required, configure the NMI by
writing the Non-Maskable Interrupt Control register (NMICTRL)
- 3.Enable GCLK_EIC or CLK_ULP32K when one
of the following configuration is selected:
- the NMI uses edge detection or
filtering.
- one EXTINT uses filtering.
- one EXTINT uses synchronous edge detection.
- one EXTINT uses debouncing.
GCLK_EIC is used when a frequency higher than 32KHz is required for filtering.
CLK_ULP32K is recommended when power consumption is the priority. For
CLK_ULP32K write a '1' to the Clock Selection bit in the Control A register
(CTRLA.CKSEL).
- 4.Configure the EIC input sense and filtering by writing the Configuration n register (CONFIG).
- 5.Optionally, enable the
asynchronous mode.
- 6.Optionally, enable the
debouncer mode.
- 7.Enable the EIC by writing a ‘1’ to
CTRLA.ENABLE.
The following bits are enable-protected,
meaning that it can only be written when the EIC is disabled (CTRLA.ENABLE=0):
- Clock Selection bit in Control A
register (CTRLA.CKSEL)
The following registers are enable-protected:
- Event Control register (EVCTRL)
- Configuration n register (CONFIG).
- External Interrupt Asynchronous Mode register (ASYNCH)
- Debouncer Enable register (DEBOUNCEN)
- Debounce Prescaler register (DPRESCALER)
Enable-protected bits in the CTRLA register can be written at the same time when setting CTRLA.ENABLE to '1', but not at the same time as CTRLA.ENABLE is being cleared.
Enable-protection is denoted by the
"Enable-Protected" property in the register description.