32.15 Register Summary - CWG
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x03BB | Reserved | |||||||||
| 0x03BC | CWG1CLK | 7:0 | CS | |||||||
| 0x03BD | CWG1ISM | 7:0 | ISM[4:0] | |||||||
| 0x03BE | CWG1DBR | 7:0 | DBR[5:0] | |||||||
| 0x03BF | CWG1DBF | 7:0 | DBF[5:0] | |||||||
| 0x03C0 | CWG1CON0 | 7:0 | EN | LD | MODE[2:0] | |||||
| 0x03C1 | CWG1CON1 | 7:0 | IN | POLD | POLC | POLB | POLA | |||
| 0x03C2 | CWG1AS0 | 7:0 | SHUTDOWN | REN | LSBD[1:0] | LSAC[1:0] | ||||
| 0x03C3 | CWG1AS1 | 7:0 | AS7E | AS6E | AS5E | AS4E | AS3E | AS2E | AS1E | AS0E |
| 0x03C4 | CWG1STR | 7:0 | OVRD | OVRC | OVRB | OVRA | STRD | STRC | STRB | STRA |
| 0x03C5 | CWG2CLK | 7:0 | CS | |||||||
| 0x03C6 | CWG2ISM | 7:0 | ISM[4:0] | |||||||
| 0x03C7 | CWG2DBR | 7:0 | DBR[5:0] | |||||||
| 0x03C8 | CWG2DBF | 7:0 | DBF[5:0] | |||||||
| 0x03C9 | CWG2CON0 | 7:0 | EN | LD | MODE[2:0] | |||||
| 0x03CA | CWG2CON1 | 7:0 | IN | POLD | POLC | POLB | POLA | |||
| 0x03CB | CWG2AS0 | 7:0 | SHUTDOWN | REN | LSBD[1:0] | LSAC[1:0] | ||||
| 0x03CC | CWG2AS1 | 7:0 | AS7E | AS6E | AS5E | AS4E | AS3E | AS2E | AS1E | AS0E |
| 0x03CD | CWG2STR | 7:0 | OVRD | OVRC | OVRB | OVRA | STRD | STRC | STRB | STRA |
| 0x03CE | CWG3CLK | 7:0 | CS | |||||||
| 0x03CF | CWG3ISM | 7:0 | ISM[4:0] | |||||||
| 0x03D0 | CWG3DBR | 7:0 | DBR[5:0] | |||||||
| 0x03D1 | CWG3DBF | 7:0 | DBF[5:0] | |||||||
| 0x03D2 | CWG3CON0 | 7:0 | EN | LD | MODE[2:0] | |||||
| 0x03D3 | CWG3CON1 | 7:0 | IN | POLD | POLC | POLB | POLA | |||
| 0x03D4 | CWG3AS0 | 7:0 | SHUTDOWN | REN | LSBD[1:0] | LSAC[1:0] | ||||
| 0x03D5 | CWG3AS1 | 7:0 | AS7E | AS6E | AS5E | AS4E | AS3E | AS2E | AS1E | AS0E |
| 0x03D6 | CWG3STR | 7:0 | OVRD | OVRC | OVRB | OVRA | STRD | STRC | STRB | STRA |