7.1 Operation
The tinyAVR 0- and 1-series, and megaAVR 0-series MCUs support a three-vector CVT mode, where the interrupt vector table is reorganized per Table 7-1. Each vector will be used to service all interrupts of corresponding priority level.
| Vector Number | Peripheral Source | Definition |
|---|---|---|
| 0 | RESET | RESET |
| 1 | NMI | Non-Maskable Interrupt vector |
| 2 | LVL1 | Level 1 Interrupt vector |
| 3 | LVL0 | Level 0 Interrupt vector |
This can be very useful when an application only needs a few interrupts. Reducing the vector table size means it will occupy less Flash, freeing up space for application code. Be aware, however, when using this approach, additional code may be needed in the ISR to find out which interrupt is actually requesting service as this will add execution time.
The Compact Vector Table is enabled by writing '1' to the CVT bit in CPUINT.CTRLA. This system critical register bit has Configuration Change Protection (CCP) to prevent accidental modification. Refer to the CPU chapter in the relevant device data sheet for details on CCP.