3.1 System Reset

The SWRST bit in the CRU.RSWRST register resets the software. The unlock sequence is needed to set this software reset bit. The address of this register is 0x4400_0a40. A write of logic ‘1’ to this bit enables the software reset. A subsequent read of this register triggers the system reset sequence. The bit can be written once the system unlock sequence is complete. This bit always reads a value of logic ‘0’.