1.3.5 ECCPx Dead-Band Delay in Half-Bridge Mode
In Half-Bridge mode, the dead-band delay is 1 TOSC longer than calculated for the first PWM cycle and 1.5 TOSC for the following cycles.
Work around
None.
Affected Silicon Revisions
| A2 | A3 | A5 | A6 | A7 | A8 | A9 | |
| X | X | X | X | X | X | X |